[PATCH 2/4] drm/amd/powerplay: get raven max/min gfx clocks
Deucher, Alexander
Alexander.Deucher at amd.com
Sat Sep 30 01:28:10 UTC 2017
> -----Original Message-----
> From: Evan Quan [mailto:evan.quan at amd.com]
> Sent: Friday, September 29, 2017 9:10 PM
> To: amd-gfx at lists.freedesktop.org
> Cc: Deucher, Alexander; Zhang, Jerry; Quan, Evan
> Subject: [PATCH 2/4] drm/amd/powerplay: get raven max/min gfx clocks
>
> Change-Id: I56e713e16b9a794857e7ecbb7ca47e0ddd727862
> Signed-off-by: Evan Quan <evan.quan at amd.com>
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c | 20
> ++++++++++++++++++++
> drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.h | 2 ++
> 2 files changed, 22 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
> index 6f0b2e5..e2ad41d 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
> @@ -421,6 +421,26 @@ static int rv_populate_clock_table(struct pp_hwmgr
> *hwmgr)
> rv_get_clock_voltage_dependency_table(hwmgr, &pinfo-
> >vdd_dep_on_phyclk,
> ARRAY_SIZE(VddPhyClk),
> &VddPhyClk[0]);
>
> + PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr-
> >smumgr,
> + PPSMC_MSG_GetMinGfxclkFrequency),
> + "Attempt to get min GFXCLK Failed!",
> + return -1);
> + PP_ASSERT_WITH_CODE(!rv_read_arg_from_smc(hwmgr->smumgr,
> + &result),
> + "Attempt to get min GFXCLK Failed!",
> + return -1);
> + rv_data->gfx_min_freq_limit = result * 100;
> +
> + PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr-
> >smumgr,
> + PPSMC_MSG_GetMaxGfxclkFrequency),
> + "Attempt to get max GFXCLK Failed!",
> + return -1);
> + PP_ASSERT_WITH_CODE(!rv_read_arg_from_smc(hwmgr->smumgr,
> + &result),
> + "Attempt to get max GFXCLK Failed!",
> + return -1);
Return proper error codes in this function. Maybe -EINVAL?
With that fixed:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> + rv_data->gfx_max_freq_limit = result * 100;
> +
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.h
> b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.h
> index 68d61bd..9dc5030 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.h
> @@ -283,6 +283,8 @@ struct rv_hwmgr {
> uint32_t vclk_soft_min;
> uint32_t dclk_soft_min;
> uint32_t gfx_actual_soft_min_freq;
> + uint32_t gfx_min_freq_limit;
> + uint32_t gfx_max_freq_limit;
>
> bool vcn_power_gated;
> bool vcn_dpg_mode;
> --
> 2.7.4
More information about the amd-gfx
mailing list