[PATCH] drm/amd/amdgpu: Merge the smc/pcie/didt debugfs read/write methods (v2)

[Tom St Denis]

Fold the read/write methods of the various register access
debugfs entries into op functions.

(v2):  Merge pcie/didt/smc op function into one

Signed-off-by: Tom St Denis <tom.stdenis at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 175 +++++++++-------------------
 1 file changed, 56 insertions(+), 119 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index c98e59721444..ce35f9c5cbde 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -177,8 +177,13 @@ static ssize_t amdgpu_debugfs_regs_write(struct file *f, const char __user *buf,
 	return amdgpu_debugfs_process_reg_op(false, f, (char __user *)buf, size, pos);
 }
 
-static ssize_t amdgpu_debugfs_regs_pcie_read(struct file *f, char __user *buf,
-					size_t size, loff_t *pos)
+#define AMDGPU_DEBUGFS_REG_PCIE 0
+#define AMDGPU_DEBUGFS_REG_DIDT 1
+#define AMDGPU_DEBUGFS_REG_SMC  2
+
+static ssize_t amdgpu_debugfs_regs_non_mmio_op(bool read, int mode,
+					struct file *f,	char __user *buf, size_t size,
+					loff_t *pos)
 {
 	struct amdgpu_device *adev = file_inode(f)->i_private;
 	ssize_t result = 0;
@@ -190,11 +195,39 @@ static ssize_t amdgpu_debugfs_regs_pcie_read(struct file *f, char __user *buf,
 	while (size) {
 		uint32_t value;
 
-		value = RREG32_PCIE(*pos >> 2);
-		r = put_user(value, (uint32_t *)buf);
-		if (r)
-			return r;
+		if (read) {
+			switch (mode) {
+				case AMDGPU_DEBUGFS_REG_PCIE:
+					value = RREG32_PCIE(*pos >> 2);
+					break;
+				case AMDGPU_DEBUGFS_REG_SMC:
+					value = RREG32_SMC(*pos >> 2);
+					break;
+				case AMDGPU_DEBUGFS_REG_DIDT:
+					value = RREG32_DIDT(*pos >> 2);
+					break;
+			}
 
+			r = put_user(value, (uint32_t *)buf);
+			if (r)
+				return r;
+		} else {
+			r = get_user(value, (uint32_t *)buf);
+			if (r)
+				return r;
+
+			switch (mode) {
+				case AMDGPU_DEBUGFS_REG_PCIE:
+					WREG32_PCIE(*pos >> 2, value);
+					break;
+				case AMDGPU_DEBUGFS_REG_SMC:
+					WREG32_SMC(*pos >> 2, value);
+					break;
+				case AMDGPU_DEBUGFS_REG_DIDT:
+					WREG32_DIDT(*pos >> 2, value);
+					break;
+			}
+		}
 		result += 4;
 		buf += 4;
 		*pos += 4;
@@ -204,142 +237,46 @@ static ssize_t amdgpu_debugfs_regs_pcie_read(struct file *f, char __user *buf,
 	return result;
 }
 
+static ssize_t amdgpu_debugfs_regs_pcie_read(struct file *f, char __user *buf,
+					size_t size, loff_t *pos)
+{
+	return amdgpu_debugfs_regs_non_mmio_op(
+				true, AMDGPU_DEBUGFS_REG_PCIE, f, buf, size, pos);
+}
+
 static ssize_t amdgpu_debugfs_regs_pcie_write(struct file *f, const char __user *buf,
 					 size_t size, loff_t *pos)
 {
-	struct amdgpu_device *adev = file_inode(f)->i_private;
-	ssize_t result = 0;
-	int r;
-
-	if (size & 0x3 || *pos & 0x3)
-		return -EINVAL;
-
-	while (size) {
-		uint32_t value;
-
-		r = get_user(value, (uint32_t *)buf);
-		if (r)
-			return r;
-
-		WREG32_PCIE(*pos >> 2, value);
-
-		result += 4;
-		buf += 4;
-		*pos += 4;
-		size -= 4;
-	}
-
-	return result;
+	return amdgpu_debugfs_regs_non_mmio_op(
+				false, AMDGPU_DEBUGFS_REG_PCIE, f, (char __user *)buf, size, pos);
 }
 
 static ssize_t amdgpu_debugfs_regs_didt_read(struct file *f, char __user *buf,
 					size_t size, loff_t *pos)
 {
-	struct amdgpu_device *adev = file_inode(f)->i_private;
-	ssize_t result = 0;
-	int r;
-
-	if (size & 0x3 || *pos & 0x3)
-		return -EINVAL;
-
-	while (size) {
-		uint32_t value;
-
-		value = RREG32_DIDT(*pos >> 2);
-		r = put_user(value, (uint32_t *)buf);
-		if (r)
-			return r;
-
-		result += 4;
-		buf += 4;
-		*pos += 4;
-		size -= 4;
-	}
-
-	return result;
+	return amdgpu_debugfs_regs_non_mmio_op(
+				true, AMDGPU_DEBUGFS_REG_DIDT, f, buf, size, pos);
 }
 
 static ssize_t amdgpu_debugfs_regs_didt_write(struct file *f, const char __user *buf,
 					 size_t size, loff_t *pos)
 {
-	struct amdgpu_device *adev = file_inode(f)->i_private;
-	ssize_t result = 0;
-	int r;
-
-	if (size & 0x3 || *pos & 0x3)
-		return -EINVAL;
-
-	while (size) {
-		uint32_t value;
-
-		r = get_user(value, (uint32_t *)buf);
-		if (r)
-			return r;
-
-		WREG32_DIDT(*pos >> 2, value);
-
-		result += 4;
-		buf += 4;
-		*pos += 4;
-		size -= 4;
-	}
-
-	return result;
+	return amdgpu_debugfs_regs_non_mmio_op(
+				false, AMDGPU_DEBUGFS_REG_DIDT, f, (char __user *)buf, size, pos);
 }
 
 static ssize_t amdgpu_debugfs_regs_smc_read(struct file *f, char __user *buf,
 					size_t size, loff_t *pos)
 {
-	struct amdgpu_device *adev = file_inode(f)->i_private;
-	ssize_t result = 0;
-	int r;
-
-	if (size & 0x3 || *pos & 0x3)
-		return -EINVAL;
-
-	while (size) {
-		uint32_t value;
-
-		value = RREG32_SMC(*pos);
-		r = put_user(value, (uint32_t *)buf);
-		if (r)
-			return r;
-
-		result += 4;
-		buf += 4;
-		*pos += 4;
-		size -= 4;
-	}
-
-	return result;
+	return amdgpu_debugfs_regs_non_mmio_op(
+				true, AMDGPU_DEBUGFS_REG_SMC, f, buf, size, pos);
 }
 
 static ssize_t amdgpu_debugfs_regs_smc_write(struct file *f, const char __user *buf,
 					 size_t size, loff_t *pos)
 {
-	struct amdgpu_device *adev = file_inode(f)->i_private;
-	ssize_t result = 0;
-	int r;
-
-	if (size & 0x3 || *pos & 0x3)
-		return -EINVAL;
-
-	while (size) {
-		uint32_t value;
-
-		r = get_user(value, (uint32_t *)buf);
-		if (r)
-			return r;
-
-		WREG32_SMC(*pos, value);
-
-		result += 4;
-		buf += 4;
-		*pos += 4;
-		size -= 4;
-	}
-
-	return result;
+	return amdgpu_debugfs_regs_non_mmio_op(
+				false, AMDGPU_DEBUGFS_REG_SMC, f, (char __user *)buf, size, pos);
 }
 
 static ssize_t amdgpu_debugfs_gca_config_read(struct file *f, char __user *buf,
-- 
2.14.3