[PATCH v2 7/7] drm/amdgpu/gmc9: use amdgpu_ring_emit_reg_write_reg_wait in gpu tlb flush

Alex Deucher alexdeucher at gmail.com
Wed Apr 4 16:50:11 UTC 2018


On Wed, Apr 4, 2018 at 12:44 AM, Emily Deng <Emily.Deng at amd.com> wrote:
> From: Alex Deucher <alexander.deucher at amd.com>
>
> Use amdgpu_ring_emit_reg_write_reg_wait.  On engines that support it,
> it provides a write and wait in a single packet which avoids a missed
> ack if a world switch happens between the request and waiting for the
> ack.
>
> Reviewed-by: Huang Rui <ray.huang at amd.com>
> Reviewed-by: Christian K├Ânig <christian.koenig at amd.com>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>

Series is:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

Please make sure vega10 and raven are working on bare metal.

Alex


> ---
>  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 8 +++-----
>  1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 070946e..aeaed7f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -385,11 +385,9 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
>         amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + (2 * vmid),
>                               upper_32_bits(pd_addr));
>
> -       amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_req + eng, req);
> -
> -       /* wait for the invalidate to complete */
> -       amdgpu_ring_emit_reg_wait(ring, hub->vm_inv_eng0_ack + eng,
> -                                 1 << vmid, 1 << vmid);
> +       amdgpu_ring_emit_reg_write_reg_wait(ring, hub->vm_inv_eng0_req + eng,
> +                                           hub->vm_inv_eng0_ack + eng,
> +                                           req, 1 << vmid);
>
>         return pd_addr;
>  }
> --
> 2.7.4
>
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