[PATCH libdrm] amdgpu: only add DRM_RDWR when kernel accept it

Christian König christian.koenig at amd.com
Tue Apr 17 08:59:22 UTC 2018


Hi guys,

CCing: dri-devel.

question to the usual suspects here: Does somebody of hand knows when 
DRM_RDWR was added and how we can check reliable if it's available or not?

Using the version number of amdgpu for this sounds a bit questionable, 
cause that reflects amdgpu functionality level and not DRM prime 
functionality level.

Thanks,
Christian.

Am 17.04.2018 um 10:48 schrieb Qiang Yu:
> For kernel < 4.6 drm_prime_handle_to_fd_ioctl won't
> accept DRM_RDWR.
>
> Sigend-off-by: Qiang Yu <Qiang.Yu at amd.com>
> ---
>   amdgpu/amdgpu_bo.c       | 8 ++++++--
>   amdgpu/amdgpu_internal.h | 2 ++
>   2 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/amdgpu/amdgpu_bo.c b/amdgpu/amdgpu_bo.c
> index 9e37b14..17f848f 100644
> --- a/amdgpu/amdgpu_bo.c
> +++ b/amdgpu/amdgpu_bo.c
> @@ -229,6 +229,7 @@ int amdgpu_bo_export(amdgpu_bo_handle bo,
>   		     uint32_t *shared_handle)
>   {
>   	int r;
> +	uint32_t flags;
>   
>   	switch (type) {
>   	case amdgpu_bo_handle_type_gem_flink_name:
> @@ -246,8 +247,11 @@ int amdgpu_bo_export(amdgpu_bo_handle bo,
>   
>   	case amdgpu_bo_handle_type_dma_buf_fd:
>   		amdgpu_add_handle_to_table(bo);
> -		return drmPrimeHandleToFD(bo->dev->fd, bo->handle,
> -					  DRM_CLOEXEC | DRM_RDWR,
> +		flags = DRM_CLOEXEC;
> +		if (AMDGPU_VERSION(bo->dev->major_version, bo->dev->minor_version) >=
> +		    AMDGPU_VERSION(3, 1))
> +			flags |= DRM_RDWR;
> +		return drmPrimeHandleToFD(bo->dev->fd, bo->handle, flags,
>   					  (int*)shared_handle);
>   	}
>   	return -EINVAL;
> diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
> index 99b8ce0..09f5036 100644
> --- a/amdgpu/amdgpu_internal.h
> +++ b/amdgpu/amdgpu_internal.h
> @@ -39,6 +39,8 @@
>   #define ROUND_UP(x, y) ((((x)-1) | __round_mask(x, y))+1)
>   #define ROUND_DOWN(x, y) ((x) & ~__round_mask(x, y))
>   
> +#define AMDGPU_VERSION(major, minor) ((major << 16) | minor)
> +
>   #define AMDGPU_INVALID_VA_ADDRESS	0xffffffffffffffff
>   #define AMDGPU_NULL_SUBMIT_SEQ		0
>   



More information about the amd-gfx mailing list