[PATCH 00/20] drm/amdgpu: gfx off support
ray.huang at amd.com
Fri Apr 20 01:29:54 UTC 2018
On Fri, Apr 20, 2018 at 01:58:33AM +0800, Kuehling, Felix wrote:
> On 2018-04-19 09:51 AM, Alex Deucher wrote:
> > On Wed, Apr 18, 2018 at 8:22 PM, Huang Rui <ray.huang at amd.com> wrote:
> >> GFXOFF is the new GPU feature that save power consumption. It used RLC to
> >> poweroff the gfx engine dynamicly when there is no workload on gfx pipe and make
> >> gfx into "idle" state.
> >> 1. Add three additional RLC ucodes, and use psp to load them.
> >> 2. Revise RLC save restore list.
> >> 3. Enable CGPG (GFX power gating).
> >> 4. Enable gfxoff.
> >> 5. Revise suspend/resume sequence.
> >> Currently, only raven is able to support gfxoff at first. And after CQE do
> >> series rounds of testing, and there is no regression that bring by gfxoff
> >> feature till now.
> >> We support two types of gfxoff, and user is able to build them manually from
> >> firmware repo:
> >> 1. Real CGPG
> >> $ make clean
> >> $ make REAL_CGPG=1
> >> 2. Faked CGPG: (by default)
> >> $ make clean
> >> $ make
> >> Then configure to enable gfxoff with ppfeaturemask=0xffffbfff.
> > A couple of things we need to take care of before enabling this:
> > 1. Need to switch it off when selecting stable pstate or profiling
> > mode in powerplay
> > 2. Need to check if gfx is on before accessing the RLC_GPU_CLOCK_COUNT
> > registers.
> I second that. Access to RLC_GPU_CLOCK_COUNT is used for some ROCm
> profiling features. Accessing the register while GFX is OFF can lead to
> hangs according to HW engineers. Also, GFX OFF resets the counter to 0,
> which would confuse any profiling code using it.
> Would it be possible to control the GFX OFF feature as part of power
> profiles? For example we could have the feature disabled in the compute
> power profile.
Yes, you're right. We have to take care the runtime RLC_GPU_CLOCK_COUNT(GC
domain) register access. :-)
We don't support enable/disable gfxoff feature dynamically yet. Yes, this
is the next step that I should try to do it. With the issue is resolved, I
think we can provide an interface as you can configure it in the power
Before that, can we return "0" at gfx_v9_0_get_gpu_clock_counter when gfx
is in off in order to bypass RLC_GPU_CLOCK_COUNT registers?
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