[PATCH xf86-video-ati 2/5] Add radeon_drm_wait_pending_flip function

Michel Dänzer michel at daenzer.net
Thu Aug 16 16:19:39 UTC 2018


From: Michel Dänzer <michel.daenzer at amd.com>

Replacing the drmmode_crtc_wait_pending_event macro.

(Ported from amdgpu commit 6029794e8a35417faf825491a89b85f713c77fc1)

Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
---
 src/drmmode_display.c  | 21 ++++-----------------
 src/radeon_drm_queue.c | 13 +++++++++++++
 src/radeon_drm_queue.h |  1 +
 3 files changed, 18 insertions(+), 17 deletions(-)

diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 2e8f91d6e..59fe9b7fc 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -100,13 +100,6 @@ RADEONZaphodStringMatches(ScrnInfoPtr pScrn, const char *s, char *output_name)
 }
 
 
-/* Wait for the boolean condition to be FALSE */
-#define drmmode_crtc_wait_pending_event(drmmode_crtc, fd, condition) \
-	do {} while ((condition) && \
-		     drmHandleEvent(fd, &drmmode_crtc->drmmode->event_context) \
-		     > 0);
-
-
 static PixmapPtr drmmode_create_bo_pixmap(ScrnInfoPtr pScrn,
 					  int width, int height,
 					  int depth, int bpp,
@@ -306,8 +299,7 @@ drmmode_do_crtc_dpms(xf86CrtcPtr crtc, int mode)
 	if (drmmode_crtc->dpms_mode == DPMSModeOn && mode != DPMSModeOn) {
 		uint32_t seq;
 
-		drmmode_crtc_wait_pending_event(drmmode_crtc, pRADEONEnt->fd,
-						drmmode_crtc->flip_pending);
+		radeon_drm_wait_pending_flip(crtc);
 
 		/*
 		 * On->Off transition: record the last vblank time,
@@ -918,8 +910,7 @@ drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode,
 			goto done;
 		}
 
-		drmmode_crtc_wait_pending_event(drmmode_crtc, pRADEONEnt->fd,
-						drmmode_crtc->flip_pending);
+		radeon_drm_wait_pending_flip(crtc);
 
 		if (!drmmode_set_mode(crtc, fb, mode, x, y))
 			goto done;
@@ -1772,14 +1763,11 @@ drmmode_output_set_tear_free(RADEONEntPtr pRADEONEnt,
 	drmmode_output->tear_free = tear_free;
 
 	if (crtc) {
-		drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
-
 		/* Wait for pending flips before drmmode_set_mode_major calls
 		 * drmmode_crtc_update_tear_free, to prevent a nested
 		 * drmHandleEvent call, which would hang
 		 */
-		drmmode_crtc_wait_pending_event(drmmode_crtc, pRADEONEnt->fd,
-						drmmode_crtc->flip_pending);
+		radeon_drm_wait_pending_flip(crtc);
 		drmmode_set_mode_major(crtc, &crtc->mode, crtc->rotation,
 				       crtc->x, crtc->y);
 	}
@@ -3370,8 +3358,7 @@ Bool radeon_do_pageflip(ScrnInfoPtr scrn, ClientPtr client,
 			radeon_cs_flush_indirect(crtc->scrn);
 
 			if (drmmode_crtc->scanout_update_pending) {
-				drmmode_crtc_wait_pending_event(drmmode_crtc, pRADEONEnt->fd,
-								drmmode_crtc->flip_pending);
+				radeon_drm_wait_pending_flip(crtc);
 				radeon_drm_abort_entry(drmmode_crtc->scanout_update_pending);
 				drmmode_crtc->scanout_update_pending = 0;
 			}
diff --git a/src/radeon_drm_queue.c b/src/radeon_drm_queue.c
index bff010fa3..69474be24 100644
--- a/src/radeon_drm_queue.c
+++ b/src/radeon_drm_queue.c
@@ -177,6 +177,19 @@ radeon_drm_abort_id(uint64_t id)
     }
 }
 
+/*
+ * Wait for pending page flip on given CRTC to complete
+ */
+void radeon_drm_wait_pending_flip(xf86CrtcPtr crtc)
+{
+    drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
+    RADEONEntPtr pRADEONEnt = RADEONEntPriv(crtc->scrn);
+    drmmode_ptr drmmode = drmmode_crtc->drmmode;
+
+    while (drmmode_crtc->flip_pending &&
+	   drmHandleEvent(pRADEONEnt->fd, &drmmode->event_context) > 0);
+}
+
 /*
  * Initialize the DRM event queue
  */
diff --git a/src/radeon_drm_queue.h b/src/radeon_drm_queue.h
index b6aab37c5..96f88bd35 100644
--- a/src/radeon_drm_queue.h
+++ b/src/radeon_drm_queue.h
@@ -47,6 +47,7 @@ uintptr_t radeon_drm_queue_alloc(xf86CrtcPtr crtc, ClientPtr client,
 void radeon_drm_abort_client(ClientPtr client);
 void radeon_drm_abort_entry(uintptr_t seq);
 void radeon_drm_abort_id(uint64_t id);
+void radeon_drm_wait_pending_flip(xf86CrtcPtr crtc);
 void radeon_drm_queue_init(ScrnInfoPtr scrn);
 void radeon_drm_queue_close(ScrnInfoPtr scrn);
 
-- 
2.18.0



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