[PATCH 01/11] drm/amdgpu: remove extra root PD alignment

[Zhang, Jerry (Junwei)]

On 08/23/2018 03:46 AM, Alex Deucher wrote:
> On Wed, Aug 22, 2018 at 11:05 AM Christian König
> <ckoenig.leichtzumerken at gmail.com> wrote:
>>
>> Just another leftover from radeon.
>
> I can't remember exactly what chip this was for.  Are you sure this
> isn't still required for SI or something like that?

FYI.

Some projects still use SI with amdgpu.

Regards,
Jerry

>
> Alex
>
>>
>> Signed-off-by: Christian König <christian.koenig at amd.com>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 +---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 ---
>>   2 files changed, 1 insertion(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>> index 662aec5c81d4..73b8dcaf66e6 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>> @@ -2566,8 +2566,6 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>>   {
>>          struct amdgpu_bo_param bp;
>>          struct amdgpu_bo *root;
>> -       const unsigned align = min(AMDGPU_VM_PTB_ALIGN_SIZE,
>> -               AMDGPU_VM_PTE_COUNT(adev) * 8);
>>          unsigned long size;
>>          uint64_t flags;
>>          int r, i;
>> @@ -2615,7 +2613,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>>          size = amdgpu_vm_bo_size(adev, adev->vm_manager.root_level);
>>          memset(&bp, 0, sizeof(bp));
>>          bp.size = size;
>> -       bp.byte_align = align;
>> +       bp.byte_align = AMDGPU_GPU_PAGE_SIZE;
>>          bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
>>          bp.flags = flags;
>>          bp.type = ttm_bo_type_kernel;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
>> index 1162c2bf3138..1c9049feaaea 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
>> @@ -48,9 +48,6 @@ struct amdgpu_bo_list_entry;
>>   /* number of entries in page table */
>>   #define AMDGPU_VM_PTE_COUNT(adev) (1 << (adev)->vm_manager.block_size)
>>
>> -/* PTBs (Page Table Blocks) need to be aligned to 32K */
>> -#define AMDGPU_VM_PTB_ALIGN_SIZE   32768
>> -
>>   #define AMDGPU_PTE_VALID       (1ULL << 0)
>>   #define AMDGPU_PTE_SYSTEM      (1ULL << 1)
>>   #define AMDGPU_PTE_SNOOPED     (1ULL << 2)
>> --
>> 2.17.1
>>
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