[PATCH 11/11] drm/amdgpu: enable GTT PD/PT for raven

[Christian König]

Am 23.08.2018 um 14:54 schrieb Huang Rui:
> On Wed, Aug 22, 2018 at 11:44:04AM -0400, Andrey Grodzovsky wrote:
>>
>> On 08/22/2018 11:05 AM, Christian König wrote:
>>> Should work on Vega10 as well, but with an obvious performance hit.
>>>
>>> Older APUs can be enabled as well, but will probably be more work.
> Raven's VRAM is actually the system memory. May I know the benefit if we
> switch the PD/PT BO from vram to gart?

We want to reduce VRAM usage as much as possible on APUs.

The end goal is that it should work with only 16MB (or was it 32MB?) 
stolen VRAM.

That is the recommended setting for newer OSes on that hardware.

Christian.

>
>>> Signed-off-by: Christian König <christian.koenig at amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 11 ++++++++++-
>>>   1 file changed, 10 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>>> index 928fdae0dab4..670a42729f88 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>>> @@ -308,6 +308,7 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>>>   			list_move(&bo_base->vm_status, &vm->moved);
>>>   			spin_unlock(&vm->moved_lock);
>>>   		} else {
>>> +			amdgpu_ttm_alloc_gart(&bo->tbo);
>> Looks like you forgot to check for return value here.
>>
> Yes, the same comment with me.
>
> Thanks,
> Ray
>
>> Andrey
>>
>>>   			list_move(&bo_base->vm_status, &vm->relocated);
>>>   		}
>>>   	}
>>> @@ -396,6 +397,10 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
>>>   	if (r)
>>>   		goto error;
>>> +	r = amdgpu_ttm_alloc_gart(&bo->tbo);
>>> +	if (r)
>>> +		return r;
>>> +
>>>   	r = amdgpu_job_alloc_with_ib(adev, 64, &job);
>>>   	if (r)
>>>   		goto error;
>>> @@ -461,7 +466,11 @@ static void amdgpu_vm_bo_param(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>>>   	bp->size = amdgpu_vm_bo_size(adev, level);
>>>   	bp->byte_align = AMDGPU_GPU_PAGE_SIZE;
>>>   	bp->domain = AMDGPU_GEM_DOMAIN_VRAM;
>>> -	bp->flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
>>> +	if (bp->size <= PAGE_SIZE && adev->asic_type == CHIP_RAVEN)
>>> +		bp->domain |= AMDGPU_GEM_DOMAIN_GTT;
>>> +	bp->domain = amdgpu_bo_get_preferred_pin_domain(adev, bp->domain);
>>> +	bp->flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
>>> +		AMDGPU_GEM_CREATE_CPU_GTT_USWC;
>>>   	if (vm->use_cpu_for_update)
>>>   		bp->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
>>>   	else
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