[PATCH 09/10] drm/amdgpu: use the AGP aperture for system memory access

[Zhang, Jerry (Junwei)]

On 08/28/2018 12:53 AM, Christian König wrote:
> Start to use the old AGP aperture for system memory access.
>
> Signed-off-by: Christian König <christian.koenig at amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c     | 24 +++++++++++++++++++++
>   drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h     |  1 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c |  9 ++++++++
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c     | 21 ++++++++++--------
>   4 files changed, 46 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> index eed5352f3136..54d353951e21 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> @@ -79,6 +79,30 @@ uint64_t amdgpu_gmc_pd_addr(struct amdgpu_bo *bo)
>   	return pd_addr;
>   }
>
> +/**
> + * amdgpu_gmc_agp_addr - return the address in the AGP address space
> + *
> + * @tbo: TTM BO which needs the address, must be in GTT domain
> + *
> + * Tries to figure out how to access the BO through the AGP aperture. Returns
> + * AMDGPU_BO_INVALID_OFFSET if that is not possible.
> + */
> +uint64_t amdgpu_gmc_agp_addr(struct ttm_buffer_object *tbo)
> +{
> +	struct amdgpu_device *adev = amdgpu_ttm_adev(tbo->bdev);
> +	struct ttm_dma_tt *ttm;
> +
> +	if (tbo->num_pages != 1 || !tbo->ttm ||
> +	    tbo->ttm->caching_state == tt_cached)
> +		return AMDGPU_BO_INVALID_OFFSET;
> +
> +	ttm = container_of(tbo->ttm, struct ttm_dma_tt, ttm);
> +	if (ttm->dma_address[0] + PAGE_SIZE >= adev->gmc.agp_size)
> +		return AMDGPU_BO_INVALID_OFFSET;
> +
> +	return adev->gmc.agp_start + ttm->dma_address[0];
> +}
> +
>   /**
>    * amdgpu_gmc_vram_location - try to find VRAM location
>    *
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> index 163110fe375d..6e8432fd3309 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> @@ -137,6 +137,7 @@ static inline bool amdgpu_gmc_vram_full_visible(struct amdgpu_gmc *gmc)
>   void amdgpu_gmc_get_pde_for_bo(struct amdgpu_bo *bo, int level,
>   			       uint64_t *addr, uint64_t *flags);
>   uint64_t amdgpu_gmc_pd_addr(struct amdgpu_bo *bo);
> +uint64_t amdgpu_gmc_agp_addr(struct ttm_buffer_object *tbo);
>   void amdgpu_gmc_vram_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc,
>   			      u64 base);
>   void amdgpu_gmc_gart_location(struct amdgpu_device *adev,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> index c2539f6821c0..deaea11eb39a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> @@ -132,6 +132,15 @@ static int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
>   	else
>   		lpfn = adev->gart.num_cpu_pages;
>
> +	if (fpfn == 0 && lpfn == adev->gart.num_cpu_pages) {
> +		uint64_t addr = amdgpu_gmc_agp_addr(tbo);
> +
> +		if (addr != AMDGPU_BO_INVALID_OFFSET) {
> +			mem->start = addr >> PAGE_SHIFT;
> +			return 0;
> +		}
> +	}
> +
>   	mode = DRM_MM_INSERT_BEST;
>   	if (place && place->flags & TTM_PL_FLAG_TOPDOWN)
>   		mode = DRM_MM_INSERT_HIGH;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index d9f3201c9e5c..281611f6bcd4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1103,15 +1103,18 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo)
>   	if (unlikely(r))
>   		return r;
>
> -	/* compute PTE flags for this buffer object */
> -	flags = amdgpu_ttm_tt_pte_flags(adev, bo->ttm, &tmp);
> -
> -	/* Bind pages */
> -	gtt->offset = ((u64)tmp.start << PAGE_SHIFT) - adev->gmc.gart_start;
> -	r = amdgpu_ttm_gart_bind(adev, bo, flags);
> -	if (unlikely(r)) {
> -		ttm_bo_mem_put(bo, &tmp);
> -		return r;
> +	if (amdgpu_gtt_mgr_has_gart_addr(&tmp)) {
> +		/* compute PTE flags for this buffer object */
> +		flags = amdgpu_ttm_tt_pte_flags(adev, bo->ttm, &tmp);
> +
> +		/* Bind pages */
> +		gtt->offset = ((u64)tmp.start << PAGE_SHIFT) -
> +			adev->gmc.gart_start;
> +		r = amdgpu_ttm_gart_bind(adev, bo, flags);
> +		if (unlikely(r)) {
> +			ttm_bo_mem_put(bo, &tmp);
> +			return r;
> +		}
>   	}
>
>   	ttm_bo_mem_put(bo, &bo->mem);
>