[PATCH] drm/amdgpu: Set the bit of ip_block_mask correspond to the IP block define

Alex Deucher alexdeucher at gmail.com
Thu Feb 1 20:51:06 UTC 2018


On Thu, Feb 1, 2018 at 3:44 PM, Liu, Shaoyun <Shaoyun.Liu at amd.com> wrote:
> In that case , even  existing implementation need to be changed and can  we  add VCE0 and  VCE1 for ex as different IP type when necessary ?

That kind of waters down the meaning of block type.  Plus if we ever
end up creating a chip with several instances, we'll end up with VCE0,
VCE1, VCE2, etc. which will waste a lot of the ip address space.

Alex

>
> Regards
> Shaoyun.liu
>
> -----Original Message-----
> From: Alex Deucher [mailto:alexdeucher at gmail.com]
> Sent: Thursday, February 01, 2018 3:37 PM
> To: Liu, Shaoyun
> Cc: Koenig, Christian; amd-gfx at lists.freedesktop.org
> Subject: Re: [PATCH] drm/amdgpu: Set the bit of ip_block_mask correspond to the IP block define
>
> On Thu, Feb 1, 2018 at 3:32 PM, Liu, Shaoyun <Shaoyun.Liu at amd.com> wrote:
>> Can you provide the example of which different block with the same type and why we want to do that ?
>> With the old implementation , the bit mask is depends on the order that driver call the  amdgpu_device_ip_block_add(),  they are not fixed .  With this change ,at least developer can count out how to set the  bit mask after check the ip type defines and  they are fixed for amdgpu driver .
>>
>
> We don't do it today, (although we could have structured SDMA that way on platforms that support two SDMA IPs).  The idea was that you might have future designs that have multiple IPs on a single SoC.  E.g., two different VCE blocks, potentially with different IP versions.
>
> Alex
>
>> Regards
>> Shaoyun.liu
>>
>>
>> -----Original Message-----
>> From: Christian König [mailto:ckoenig.leichtzumerken at gmail.com]
>> Sent: Thursday, February 01, 2018 3:17 PM
>> To: Liu, Shaoyun; amd-gfx at lists.freedesktop.org
>> Subject: Re: [PATCH] drm/amdgpu: Set the bit of ip_block_mask
>> correspond to the IP block define
>>
>> NAK, there might be different blocks with the same type and we want to be able to disable/enable them individually.
>>
>> But we could improve a bit printing which block has which number during startup.
>>
>> Regards,
>> Christian.
>>
>> Am 01.02.2018 um 21:10 schrieb Shaoyun Liu:
>>> Change-Id: I4bdc6dbcd82f32416f65e0a38fb9c3cb580684bf
>>> Signed-off-by: Shaoyun Liu <Shaoyun.Liu at amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
>>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> index 21be5e5..05bf9b6 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>>> @@ -1297,7 +1297,8 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
>>>       }
>>>
>>>       for (i = 0; i < adev->num_ip_blocks; i++) {
>>> -             if ((amdgpu_ip_block_mask & (1 << i)) == 0) {
>>> +             if ((amdgpu_ip_block_mask &
>>> +                     (1 << adev->ip_blocks[i].version->type)) == 0)
>>> + {
>>>                       DRM_ERROR("disabled ip block: %d <%s>\n",
>>>                                 i, adev->ip_blocks[i].version->funcs->name);
>>>                       adev->ip_blocks[i].status.valid = false;
>>
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