[PATCH] drm/amd/pp: Fix logic error of disable mclk switch on Vega10

Alex Deucher alexdeucher at gmail.com
Fri Feb 2 15:29:55 UTC 2018


On Fri, Feb 2, 2018 at 1:56 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> Change-Id: I38b60d0be9dc800a3492dd9fb17dc56ade77c0db
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 11 ++++-------
>  1 file changed, 4 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> index 292f013..dfaadab 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> @@ -3164,16 +3164,14 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
>                 minimum_clocks.memoryClock = stable_pstate_mclk;
>         }
>
> -       disable_mclk_switching_for_frame_lock = phm_cap_enabled(
> -                                   hwmgr->platform_descriptor.platformCaps,
> -                                   PHM_PlatformCaps_DisableMclkSwitchingForFrameLock);
> +       disable_mclk_switching_for_frame_lock = PP_CAP(PHM_PlatformCaps_DisableMclkSwitchingForFrameLock);
>         disable_mclk_switching_for_vr = PP_CAP(PHM_PlatformCaps_DisableMclkSwitchForVR);
>         force_mclk_high = PP_CAP(PHM_PlatformCaps_ForceMclkHigh);
>
> -       disable_mclk_switching = (info.display_count > 1) ||
> -                                   disable_mclk_switching_for_frame_lock ||
> +       disable_mclk_switching = (info.display_count > 1) &&
> +                                   (disable_mclk_switching_for_frame_lock ||
>                                     disable_mclk_switching_for_vr ||
> -                                   force_mclk_high;
> +                                   force_mclk_high);

I think this breaks the single display logic.  In this case, we
probably display_count >= 1 if we switch the logic to &&.

Alex

>
>         sclk = vega10_ps->performance_levels[0].gfx_clock;
>         mclk = vega10_ps->performance_levels[0].mem_clock;
> @@ -5160,6 +5158,5 @@ int vega10_hwmgr_init(struct pp_hwmgr *hwmgr)
>  {
>         hwmgr->hwmgr_func = &vega10_hwmgr_funcs;
>         hwmgr->pptable_func = &vega10_pptable_funcs;
> -
>         return 0;
>  }
> --
> 1.9.1
>
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