[PATCH] drm/amdgpu: Add place holder for soc15 asic init on emulation

Tue Feb 6 22:02:03 UTC 2018

Yes, I made that suggestion in order to make it easy for us to replace the massive function we use in emulation with a stub function for upstream. I figured if we had that function in a separate file it would be cleaner, but maybe that is not the case.

I was thinking that we could replace the upstream stub file with an NPI-specific file for most of our emulator work, then go back to the stub file once VBIOS was enabled and we no longer needed the SOC init sequence from HW.

I guess from a CM perspective it doesn't make a lot of difference whether we add 20,000 lines to a file and delete them later or replace a short file with a 20,000 line file and then replace it again later... so maybe we don't need to move the function out after all.

________________________________
From: Liu, Shaoyun
Sent: February 6, 2018 4:55 PM
To: Alex Deucher; Bridgman, John
Cc: amd-gfx list
Subject: RE: [PATCH] drm/amdgpu: Add place holder for soc15 asic init on emulation

Ye, I  try to put  the asic specific  register sequences for emulation in a separate emu_soc.c file, I think it's suggested by John or you ?  The asic specific code will  be  keep in separate bring up branch , but a common place to add them  seems  not bad to me .

Shaoyun.liu

-----Original Message-----
From: Alex Deucher [mailto:alexdeucher at gmail.com]
Sent: Tuesday, February 06, 2018 4:46 PM
To: Liu, Shaoyun
Cc: amd-gfx list
Subject: Re: [PATCH] drm/amdgpu: Add place holder for soc15 asic init on emulation

On Tue, Feb 6, 2018 at 4:41 PM, Shaoyun Liu <Shaoyun.Liu at amd.com> wrote:
> Change-Id: I6ff04e1199d1ebdbdb31d0e7e8ca3c240c61ab3a
> Signed-off-by: Shaoyun Liu <Shaoyun.Liu at amd.com>

What is the purpose of this?  If it's just as a hint the the driver writer as to where to add the emulation register sequences from the IP teams, I don't see much value in it.  Just add a comment.

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/Makefile  |  2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu.h  |  2 ++
> drivers/gpu/drm/amd/amdgpu/emu_soc.c | 33 +++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/amd/amdgpu/soc15.c   |  4 ++++
>  4 files changed, 40 insertions(+), 1 deletion(-)  create mode 100644
> drivers/gpu/drm/amd/amdgpu/emu_soc.c
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
> b/drivers/gpu/drm/amd/amdgpu/Makefile
> index 1f6d43e..6f5db5e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/Makefile
> +++ b/drivers/gpu/drm/amd/amdgpu/Makefile
> @@ -41,7 +41,7 @@ amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o
> kv_smc.o kv_dpm.o \  amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o
> gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o si_dpm.o si_smc.o
>
>  amdgpu-y += \
> -       vi.o mxgpu_vi.o nbio_v6_1.o soc15.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o vega20_reg_init.o nbio_v7_4.o
> +       vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o
> + nbio_v7_0.o vega10_reg_init.o vega20_reg_init.o nbio_v7_4.o
>
>  # add GMC block
>  amdgpu-y += \
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index d417cfb..13aa8a8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1740,6 +1740,8 @@ void amdgpu_mm_wreg(struct amdgpu_device *adev,
> uint32_t reg, uint32_t v,  bool amdgpu_device_asic_has_dc_support(enum
> amd_asic_type asic_type);  bool amdgpu_device_has_dc_support(struct
> amdgpu_device *adev);
>
> +int emu_soc_asic_init(struct amdgpu_device *adev);
> +
>  /*
>   * Registers read & write functions.
>   */
> diff --git a/drivers/gpu/drm/amd/amdgpu/emu_soc.c
> b/drivers/gpu/drm/amd/amdgpu/emu_soc.c
> new file mode 100644
> index 0000000..d72c25c
> --- /dev/null
> +++ b/drivers/gpu/drm/amd/amdgpu/emu_soc.c
> @@ -0,0 +1,33 @@
> +/*
> + * Copyright 2018 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person
> +obtaining a
> + * copy of this software and associated documentation files (the
> +"Software"),
> + * to deal in the Software without restriction, including without
> +limitation
> + * the rights to use, copy, modify, merge, publish, distribute,
> +sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom
> +the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> +included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> +EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF

Is there an expectation that MAM block features will become available under virtualization at some point in the future, eg Navi10 ?

> +MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT
> +SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM,
> +DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
> +OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
> +OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + */
> +#include "amdgpu.h"
> +#include "soc15.h"
> +
> +#include "soc15_common.h"
> +#include "soc15_hw_ip.h"
> +
> +int emu_soc_asic_init(struct amdgpu_device *adev) {
> +       return 0;
> +}
> +
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
> b/drivers/gpu/drm/amd/amdgpu/soc15.c
> index 22cd84f..6a3d108 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc15.c
> +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
> @@ -747,6 +747,10 @@ static int soc15_common_hw_init(void *handle)  {
>         struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> +       /* Add asic specific init sequence for emulation */
> +       if (amdgpu_emu_mode == 1)
> +               emu_soc_asic_init(adev);
> +
>         /* enable pcie gen2/3 link */
>         soc15_pcie_gen3_enable(adev);
>         /* enable aspm */
> --
> 1.9.1
>
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