[PATCH 05/10] drm/amd/pp: Implement get_power_profile_mode on smu7
Alex Deucher
alexdeucher at gmail.com
Thu Feb 8 15:10:30 UTC 2018
On Thu, Feb 8, 2018 at 4:14 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> It show what parameters can be setted on smu7(vi/ci asics)
> to get better performance.
>
> Also show some profiling modes, user can select directly
> by serial number based on workloads.
>
> cat pp_power_profile_mode
> NUM MODE_NAME SCLK_UP_HYST SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL MCLK_UP_HYST MCLK_DOWN_HYST MCLK_ACTIVE_LEVEL
> 0 3D_FULL_SCREEN: 0 100 30 0 100 10
> 1 POWER_SAVING: 10 0 30 - - -
> 2 VIDEO: - - - 10 16 31
> 3 VR: 0 11 50 0 100 10
> 4 COMPUTE: 0 5 30 - - -
> 5 CUSTOM: 0 0 0 0 0 0
> * CURRENT: 0 100 30 0 100 10
>
> Change-Id: If0e9796d6cbe531ce1eb5ff181fe2f5f956437b6
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 87 ++++++++++++++++++++++++
> 1 file changed, 87 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index 9379713..8cf95d9 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -81,6 +81,21 @@
> #define PCIE_BUS_CLK 10000
> #define TCLK (PCIE_BUS_CLK / 10)
>
> +static const struct profile_mode_setting smu7_profiling[5] =
> + {{1, 0, 100, 30, 1, 0, 100, 10},
> + {1, 10, 0, 30, 0, 0, 0, 0},
> + {0, 0, 0, 0, 1, 10, 16, 31},
> + {1, 0, 11, 50, 1, 0, 100, 10},
> + {1, 0, 5, 30, 0, 0, 0, 0},
> + };
> +
> +static const struct profile_mode_setting polaris11_profiling[5] =
> + {{1, 0, 100, 30, 1, 0, 100, 10},
> + {1, 10, 0, 30, 0, 0, 0, 0},
> + {0, 0, 0, 0, 1, 10, 16, 62},
> + {1, 0, 11, 50, 1, 0, 100, 10},
> + {1, 0, 5, 30, 0, 0, 0, 0},
> + };
>
> /** Values for the CG_THERMAL_CTRL::DPM_EVENT_SRC field. */
> enum DPM_EVENT_SRC {
> @@ -4932,6 +4947,77 @@ static int smu7_odn_edit_dpm_table(struct pp_hwmgr *hwmgr,
> return 0;
> }
>
> +static int smu7_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf)
> +{
> + struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
> + uint32_t i, size = 0;
> + uint32_t len;
> +
> + static const char *profile_name[6] = {"3D_FULL_SCREEN",
> + "POWER_SAVING",
> + "VIDEO",
> + "VR",
> + "COMPUTE",
> + "CUSTOM"};
> +
> + static const char *title[8] = {"NUM",
> + "MODE_NAME",
> + "SCLK_UP_HYST",
> + "SCLK_DOWN_HYST",
> + "SCLK_ACTIVE_LEVEL",
> + "MCLK_UP_HYST",
> + "MCLK_DOWN_HYST",
> + "MCLK_ACTIVE_LEVEL"};
> +
> + if (!buf)
> + return -EINVAL;
> +
> + size += sprintf(buf + size, "%s %16s %16s %16s %16s %16s %16s %16s\n",
> + title[0], title[1], title[2], title[3],
> + title[4], title[5], title[6], title[7]);
> +
> + len = sizeof(smu7_profiling) / sizeof(struct profile_mode_setting);
> +
> + for (i = 0; i < len; i++) {
> + if (smu7_profiling[i].bupdate_sclk)
> + size += sprintf(buf + size, "%3d %16s: %8d %16d %16d ",
> + i, profile_name[i], smu7_profiling[i].sclk_up_hyst,
> + smu7_profiling[i].sclk_down_hyst,
> + smu7_profiling[i].sclk_activity);
> + else
> + size += sprintf(buf + size, "%3d %16s: %8s %16s %16s ",
> + i, profile_name[i], "-", "-", "-");
> +
> + if (smu7_profiling[i].bupdate_mclk)
> + size += sprintf(buf + size, "%16d %16d %16d\n",
> + smu7_profiling[i].mclk_up_hyst,
> + smu7_profiling[i].mclk_down_hyst,
> + smu7_profiling[i].mclk_activity);
> + else
> + size += sprintf(buf + size, "%16s %16s %16s\n",
> + "-", "-", "-");
> + }
> +
> + size += sprintf(buf + size, "%3d %16s: %8d %16d %16d %16d %16d %16d\n",
> + i, profile_name[i],
> + data->custom_profile_setting.sclk_up_hyst,
> + data->custom_profile_setting.sclk_down_hyst,
> + data->custom_profile_setting.sclk_activity,
> + data->custom_profile_setting.mclk_up_hyst,
> + data->custom_profile_setting.mclk_down_hyst,
> + data->custom_profile_setting.mclk_activity);
> +
> + size += sprintf(buf + size, "%3s %16s: %8d %16d %16d %16d %16d %16d\n",
> + "*", "CURRENT",
> + data->current_profile_setting.sclk_up_hyst,
> + data->current_profile_setting.sclk_down_hyst,
> + data->current_profile_setting.sclk_activity,
> + data->current_profile_setting.mclk_up_hyst,
> + data->current_profile_setting.mclk_down_hyst,
> + data->current_profile_setting.mclk_activity);
> +
> + return size;
> +}
>
> static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
> .backend_init = &smu7_hwmgr_backend_init,
> @@ -4988,6 +5074,7 @@ static int smu7_odn_edit_dpm_table(struct pp_hwmgr *hwmgr,
> .get_thermal_temperature_range = smu7_get_thermal_temperature_range,
> .odn_edit_dpm_table = smu7_odn_edit_dpm_table,
> .set_power_limit = smu7_set_power_limit,
> + .get_power_profile_mode = smu7_get_power_profile_mode,
> };
>
> uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,
> --
> 1.9.1
>
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