[PATCH 1/2] drm/amdgpu: separate PASID mapping from VM flush

[Christian König]

Am 15.02.2018 um 20:16 schrieb Felix Kuehling:
> On 2018-02-15 09:24 AM, Christian König wrote:
>> Stuffing the PASID mapping into the VM flush isn't flexible enough since
>> the PASID mapping changes not as often as we need a VM flush.
>>
>> Signed-off-by: Christian König <christian.koenig at amd.com>
> One comment inline. Other than that this is Reviewed-by: Felix Kuehling
> <Felix.Kuehling at amd.com>
>
> [snip]
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
>> index 761def04f93f..b67e90258271 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
>> @@ -436,8 +436,7 @@ static void gmc_v7_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid)
>>   }
>>   
>>   static uint64_t gmc_v7_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
>> -					    unsigned vmid, unsigned pasid,
>> -					    uint64_t pd_addr)
>> +					    unsigned vmid, uint64_t pd_addr)
>>   {
>>   	uint32_t reg;
>>   
>> @@ -447,14 +446,18 @@ static uint64_t gmc_v7_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
>>   		reg = mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + vmid - 8;
>>   	amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12);
>>   
>> -	amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid);
>> -
>>   	/* bits 0-15 are the VM contexts0-15 */
>>   	amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid);
>>   
>>   	return pd_addr;
>>   }
>>   
>> +static void gmc_v7_0_emit_pasid_mapping(struct amdgpu_ring *ring, unsigned vmid,
>> +					unsigned pasid)
>> +{
>> +	amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid);
>> +}
>> +
> This looks like you're adding an unused static function. Should this be
> hooked up to a function pointer somewhere?

Ups, yeah indeed. Going to fix this up in V2 and then push the patches 
tomorrow.

Thanks for catching this,
Christian.

>
>>   /**
>>    * gmc_v7_0_set_pte_pde - update the page tables using MMIO
>>    *
>>