gmc9 vram width

tom tstdenis at amd.com
Mon Feb 26 13:24:47 UTC 2018


In the init sequence we have

static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
{
	u32 tmp;
	int chansize, numchan;
	int r;

	if (amdgpu_emu_mode != 1)
		adev->gmc.vram_width = amdgpu_atomfirmware_get_vram_width(adev);
	if (!adev->gmc.vram_width) {
		/* hbm memory channel size */
		chansize = 128;

but on APUs the chansize should be 64 right?

With one DIMM installed it prints out 128 as the width and with 2 dimms 
(in dual channel config) it prints 256 bits.

Right?

Tom


More information about the amd-gfx mailing list