[PATCH 2/2] drm/amd/pp: Add custom power profile mode support on Vega10
Alex Deucher
alexdeucher at gmail.com
Tue Jan 16 15:59:32 UTC 2018
On Tue, Jan 16, 2018 at 6:50 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> v2: delete uncessary blank line.
> Add static const modifiers to an array
>
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
>
> Change-Id: If6b81ade742ef434717010ca0783d2af9145c975
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
Do you have a similar patch for smu7 yet?
> ---
> drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 38 +++++++++++
> drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 78 ++++++++++++++++++++++
> drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h | 1 +
> drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 3 +
> 4 files changed, 120 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index 8859b67..5e22521 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -1081,6 +1081,42 @@ static int pp_dpm_get_power_profile_state(void *handle,
> return 0;
> }
>
> +static int pp_get_power_profile_mode(void *handle, char *buf)
> +{
> + struct pp_hwmgr *hwmgr;
> + struct pp_instance *pp_handle = (struct pp_instance *)handle;
> +
> + if (!buf || pp_check(pp_handle))
> + return -EINVAL;
> +
> + hwmgr = pp_handle->hwmgr;
> +
> + if (hwmgr->hwmgr_func->get_power_profile_mode == NULL) {
> + pr_info("%s was not implemented.\n", __func__);
> + return snprintf(buf, PAGE_SIZE, "\n");
> + }
> +
> + return hwmgr->hwmgr_func->get_power_profile_mode(hwmgr, buf);
> +}
> +
> +static int pp_set_power_profile_mode(void *handle, long *input, uint32_t size)
> +{
> + struct pp_hwmgr *hwmgr;
> + struct pp_instance *pp_handle = (struct pp_instance *)handle;
> +
> + if (pp_check(pp_handle))
> + return -EINVAL;
> +
> + hwmgr = pp_handle->hwmgr;
> +
> + if (hwmgr->hwmgr_func->set_power_profile_mode == NULL) {
> + pr_info("%s was not implemented.\n", __func__);
> + return -EINVAL;
> + }
> +
> + return hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, input, size);
> +}
> +
> static int pp_dpm_set_power_profile_state(void *handle,
> struct amd_pp_profile *request)
> {
> @@ -1464,6 +1500,8 @@ static int pp_get_display_mode_validation_clocks(void *handle,
> .switch_power_profile = pp_dpm_switch_power_profile,
> .set_clockgating_by_smu = pp_set_clockgating_by_smu,
> .notify_smu_memory_info = pp_dpm_notify_smu_memory_info,
> + .get_power_profile_mode = pp_get_power_profile_mode,
> + .set_power_profile_mode = pp_set_power_profile_mode,
> /* export to DC */
> .get_sclk = pp_dpm_get_sclk,
> .get_mclk = pp_dpm_get_mclk,
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> index 7e6feed..d5abd46 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> @@ -760,6 +760,8 @@ static int vega10_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
>
> hwmgr->backend = data;
>
> + hwmgr->power_profile_mode = PP_SMC_POWER_PROFILE_VIDEO;
> +
> vega10_set_default_registry_data(hwmgr);
>
> data->disable_dpm_mask = 0xff;
> @@ -3963,6 +3965,7 @@ static int vega10_read_sensor(struct pp_hwmgr *hwmgr, int idx,
> ret = -EINVAL;
> break;
> }
> +
> return ret;
> }
>
> @@ -5021,6 +5024,79 @@ static int vega10_register_thermal_interrupt(struct pp_hwmgr *hwmgr,
> return 0;
> }
>
> +static int vega10_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf)
> +{
> + struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
> + uint32_t i, size = 0;
> + static const uint8_t profile_mode_setting[5][4] = {{70, 60, 1, 3,},
> + {90, 60, 0, 0,},
> + {70, 60, 0, 0,},
> + {70, 90, 0, 0,},
> + {30, 60, 0, 6,},
> + };
> + static const char *profile_name[6] = {"3D_FULL_SCREEN",
> + "POWER_SAVING",
> + "VIDEO",
> + "VR",
> + "COMPUTER",
> + "CUSTOM"};
> + static const char *title[6] = {"NUM",
> + "MODE_NAME",
> + "BUSY_SET_POINT",
> + "FPS",
> + "USE_RLC_BUSY",
> + "MIN_ACTIVE_LEVEL"};
> +
> + if (!buf)
> + return -EINVAL;
> +
> + size += sprintf(buf + size, "%s %16s %s %s %s %s\n",title[0],
> + title[1], title[2], title[3], title[4], title[5]);
> +
> + for (i = 0; i < PP_SMC_POWER_PROFILE_CUSTOM; i++)
> + size += sprintf(buf + size, "%3d %14s%s: %14d %3d %10d %14d\n",
> + i, profile_name[i], (i == hwmgr->power_profile_mode) ? "*" : " ",
> + profile_mode_setting[i][0], profile_mode_setting[i][1],
> + profile_mode_setting[i][2], profile_mode_setting[i][3]);
> + size += sprintf(buf + size, "%3d %14s%s: %14d %3d %10d %14d\n", i,
> + profile_name[i], (i == hwmgr->power_profile_mode) ? "*" : " ",
> + data->custom_profile_mode[0], data->custom_profile_mode[1],
> + data->custom_profile_mode[2], data->custom_profile_mode[3]);
> + return size;
> +}
> +
> +static int vega10_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint32_t size)
> +{
> + struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
> + uint8_t busy_set_point;
> + uint8_t FPS;
> + uint8_t use_rlc_busy;
> + uint8_t min_active_level;
> +
> + hwmgr->power_profile_mode = input[size];
> +
> + smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_SetWorkloadMask,
> + 1<<hwmgr->power_profile_mode);
> +
> + if (hwmgr->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) {
> + if (size == 0 || size > 4)
> + return -EINVAL;
> +
> + data->custom_profile_mode[0] = busy_set_point = input[0];
> + data->custom_profile_mode[1] = FPS = input[1];
> + data->custom_profile_mode[2] = use_rlc_busy = input[2];
> + data->custom_profile_mode[3] = min_active_level = input[3];
> + smum_send_msg_to_smc_with_parameter(hwmgr,
> + PPSMC_MSG_SetCustomGfxDpmParameters,
> + busy_set_point | FPS<<8 |
> + use_rlc_busy << 16 | min_active_level<<24);
> + pr_info("size is %d value is %x \n", size, busy_set_point | FPS<<8 |
> + use_rlc_busy << 16 | min_active_level<<24);
> + }
> +
> + return 0;
> +}
> +
> static const struct pp_hwmgr_func vega10_hwmgr_funcs = {
> .backend_init = vega10_hwmgr_backend_init,
> .backend_fini = vega10_hwmgr_backend_fini,
> @@ -5078,6 +5154,8 @@ static int vega10_register_thermal_interrupt(struct pp_hwmgr *hwmgr,
> .get_thermal_temperature_range = vega10_get_thermal_temperature_range,
> .register_internal_thermal_interrupt = vega10_register_thermal_interrupt,
> .start_thermal_controller = vega10_start_thermal_controller,
> + .get_power_profile_mode = vega10_get_power_profile_mode,
> + .set_power_profile_mode = vega10_set_power_profile_mode,
> };
>
> int vega10_hwmgr_init(struct pp_hwmgr *hwmgr)
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h
> index e8507ff..689fe9f 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h
> @@ -389,6 +389,7 @@ struct vega10_hwmgr {
> uint32_t config_telemetry;
> uint32_t acg_loop_state;
> uint32_t mem_channels;
> + uint8_t custom_profile_mode[4];
> };
>
> #define VEGA10_DPM2_NEAR_TDP_DEC 10
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> index f37f211..800d773 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> @@ -342,6 +342,8 @@ struct pp_hwmgr_func {
> uint32_t size);
> int (*get_thermal_temperature_range)(struct pp_hwmgr *hwmgr,
> struct PP_TemperatureRange *range);
> + int (*get_power_profile_mode)(struct pp_hwmgr *hwmgr, char *buf);
> + int (*set_power_profile_mode)(struct pp_hwmgr *hwmgr, long *input, uint32_t size);
> };
>
> struct pp_table_func {
> @@ -750,6 +752,7 @@ struct pp_hwmgr {
> struct amd_pp_profile default_compute_power_profile;
> enum amd_pp_profile_type current_power_profile;
> bool en_umd_pstate;
> + uint32_t power_profile_mode;
> };
>
> struct cgs_irq_src_funcs {
> --
> 1.9.1
>
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