Why the vram always with WC flag even if the architecture don't support WC memory

[Lvzhihong (ReJohn)]

> I think it's fine. Platforms without write-combining should fall back to normal uncacheable mappings. This is fine for VRAM, because it can't be cacheable. But for GTT, we want to use cacheable mappings if write-
> combining isn't available, because uncacheable mappings would be much slower.


> -- 
> Earthling Michel Dänzer               |               http://www.amd.com
> Libre software enthusiast             |             Mesa and X developer

 Thanks for your reply.
 Ok, but I can't find the code of fall back to normal uncacheable mappings. Is it a software behavior or hardware behavior ?