[PATCH] drm/amdgpu: use queue 0 for kiq ring

[Huang Rui]

On Tue, Jan 23, 2018 at 06:28:52AM +0800, Kuehling, Felix wrote:
> KFD currently hard-codes MEC2, Pipe0, Queue0 for the HIQ. (For some
> reason KFD numbers MECs starting from 1, not 0.)
> 
> So that narrows your choice for KIQ on MEC2 down to pipe == 1, queue == 0.
> 

Yes, actually, we use mec2 pipe1 queue0 for KIQ at current for this patch.

Thanks
Ray