[PATCH] drm/amdgpu: use ttm pool first
Chunming Zhou
zhoucm1 at amd.com
Wed Jan 24 10:32:03 UTC 2018
On 2018年01月24日 17:49, Christian König wrote:
> Am 24.01.2018 um 10:48 schrieb Chunming Zhou:
>>
>>
>> On 2018年01月24日 17:43, Christian König wrote:
>>> Am 24.01.2018 um 10:17 schrieb Chunming Zhou:
>>>> dma path is low than ttm pool.
>>>
>>> That won't work correctly in some cases.
>>>
>>>> Question:
>>>> But why need two path? What spicific problem can be solved by dma
>>>> path?
>>>
>>> That is mostly for ARM and some (rare) x86 platforms without IOMMU
>>> where some memory is above the 40bit limit in the PCIe address space.
>>>
>>> Our GPUs can unfortunately only deal with 40bits of address space,
>>> so on those systems we need to go the slow path and make sure that
>>> we don't try to touch that high memory.
>>>
>>> What we could really improve is the detection using
>>> swiotlb_nr_tbl(), cause that is actually completely wrong.
>> OK, the patch is trying to use ttm pool first, if dma_map_page fails,
>> then fallback to swtlb path, is that ok?
>
> Nope, as I wrote that won't work. You must improve the detection if we
> need coherent or not coherent allocation.
But how to differentiate coherent or not coherent allocation? check if
max io address of system memory under 40bits pcie address space? Do you
know how to get the max io address of system memory?
Regards,
David Zhou
>
> Regards,
> Christian.
>
>>
>> Regards,
>> David Zhou
>>>
>>> Regards,
>>> Christian.
>>>
>>>>
>>>> Change-Id: I4a9fc7103658e643f33e267616fc69743b20b09e
>>>> Signed-off-by: Chunming Zhou <david1.zhou at amd.com>
>>>> ---
>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 10 ++++++----
>>>> 1 file changed, 6 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>>> index d32f48259c40..8d8a616bf4f5 100644
>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>>> @@ -996,6 +996,7 @@ static int amdgpu_ttm_tt_populate(struct ttm_tt
>>>> *ttm,
>>>> struct amdgpu_device *adev = amdgpu_ttm_adev(ttm->bdev);
>>>> struct amdgpu_ttm_tt *gtt = (void *)ttm;
>>>> bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
>>>> + int r;
>>>> if (ttm->state != tt_unpopulated)
>>>> return 0;
>>>> @@ -1017,13 +1018,14 @@ static int amdgpu_ttm_tt_populate(struct
>>>> ttm_tt *ttm,
>>>> return 0;
>>>> }
>>>> + r = ttm_populate_and_map_pages(adev->dev, >t->ttm, ctx);
>>>> +
>>>> #ifdef CONFIG_SWIOTLB
>>>> - if (swiotlb_nr_tbl()) {
>>>> - return ttm_dma_populate(>t->ttm, adev->dev, ctx);
>>>> + if ((r == -EFAULT) && swiotlb_nr_tbl()) {
>>>> + r = ttm_dma_populate(>t->ttm, adev->dev, ctx);
>>>> }
>>>> #endif
>>>> -
>>>> - return ttm_populate_and_map_pages(adev->dev, >t->ttm, ctx);
>>>> + return r;
>>>> }
>>>> static void amdgpu_ttm_tt_unpopulate(struct ttm_tt *ttm)
>>>
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>>
>
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