[PATCH] drm/amdgpu: use ttm pool first

[Chunming Zhou]

On 2018年01月24日 18:52, Christian König wrote:
> Am 24.01.2018 um 11:32 schrieb Chunming Zhou:
>> On 2018年01月24日 17:49, Christian König wrote:
>>> [SNIP]
>>> Nope, as I wrote that won't work. You must improve the detection if 
>>> we need coherent or not coherent allocation.
>> But how to differentiate coherent or not coherent allocation? check 
>> if max io address of system memory under 40bits pcie address space? 
>> Do you know how to get the max io address of system memory?
>
> Well that is a good question, which nobody had an answer for so far 
> (and a couple of people already looked into it).
>
> We could start by checking if max_pfn is <= the 40bits limit or if 
> IOMMU is enabled instead of SWIOTLB.
How to get max_pfn?

btw, seems only amdgpu and radeon driver use dma path.

Regards,
David Zhou
>
> Regards,
> Christian.