[PATCH 4/4] drm/amd/pp: Implement set_power_profile_mode on smu7
Eric Huang
jinhuieric.huang at amd.com
Wed Jan 24 16:04:55 UTC 2018
We have min_sclk and min_mclk in previous power profile parameters for
VI, which are similar with min_active_level for Vega10. How to implement
these parameters?
Regards,
Eric
On 2018-01-24 04:37 AM, Rex Zhu wrote:
> User can set smu7 profile pamameters through sysfs
>
> echo "0/1/2/3/4">pp_power_profile_mode
> to select 3D_FULL_SCREEN/POWER_SAVING/VIDEO/VR/COMPUTE
> mode.
> echo "5 * * * * * * * *">pp_power_profile_mode
> to config custom mode.
> "5 * * * * * * * *" mean "CUSTOM enable_sclk SCLK_UP_HYST
> SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL enable_mclk MCLK_UP_HYST
> MCLK_DOWN_HYST MCLK_ACTIVE_LEVEL"
>
> Change-Id: Ic6d6f37363bc81ab17051285f6ace847edf725de
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 49 +++++++++++++++++++++++-
> 1 file changed, 48 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index 9f6afd5..13db75c 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -5036,7 +5036,54 @@ static int smu7_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf)
>
> static int smu7_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint32_t size)
> {
> - /* To Do */
> + struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
> + struct profile_mode_setting tmp;
> +
> + hwmgr->power_profile_mode = input[size];
> +
> + switch (hwmgr->power_profile_mode) {
> + case PP_SMC_POWER_PROFILE_CUSTOM:
> + if (size < 8)
> + return -EINVAL;
> +
> + data->custom_profile_setting.bupdate_sclk = input[0];
> + data->custom_profile_setting.sclk_up_hyst = input[1];
> + data->custom_profile_setting.sclk_down_hyst = input[2];
> + data->custom_profile_setting.sclk_activity = input[3];
> + data->custom_profile_setting.bupdate_mclk = input[4];
> + data->custom_profile_setting.mclk_up_hyst = input[5];
> + data->custom_profile_setting.mclk_down_hyst = input[6];
> + data->custom_profile_setting.mclk_activity = input[7];
> + if (!smum_update_dpm_settings(hwmgr, &data->custom_profile_setting))
> + memcpy(&data->current_profile_setting, &data->custom_profile_setting, sizeof(struct profile_mode_setting));
> + break;
> + case PP_SMC_POWER_PROFILE_FULLSCREEN3D:
> + case PP_SMC_POWER_PROFILE_POWERSAVING:
> + case PP_SMC_POWER_PROFILE_VIDEO:
> + case PP_SMC_POWER_PROFILE_VR:
> + case PP_SMC_POWER_PROFILE_COMPUTE:
> + memcpy(&tmp, &smu7_profiling[hwmgr->power_profile_mode], sizeof(struct profile_mode_setting));
> + if (!smum_update_dpm_settings(hwmgr, &tmp)) {
> + if (tmp.bupdate_sclk) {
> + data->current_profile_setting.bupdate_sclk = tmp.bupdate_sclk;
> + data->current_profile_setting.sclk_up_hyst = tmp.sclk_up_hyst;
> + data->current_profile_setting.sclk_down_hyst = tmp.sclk_down_hyst;
> + data->current_profile_setting.sclk_activity = tmp.sclk_activity;
> + }
> + if (tmp.bupdate_mclk) {
> + data->current_profile_setting.bupdate_mclk = tmp.bupdate_mclk;
> + data->current_profile_setting.mclk_up_hyst = tmp.mclk_up_hyst;
> + data->current_profile_setting.mclk_down_hyst = tmp.mclk_down_hyst;
> + data->current_profile_setting.mclk_activity = tmp.mclk_activity;
> + }
> + }
> + break;
> + case PP_SMC_POWER_PROFILE_AUTO: /* TO DO auto wattman feature not implement */
> + return 0;
> + default:
> + return -EINVAL;
> + }
> +
> return 0;
> }
>
More information about the amd-gfx
mailing list