[PATCH 06/13] drm/amdgpu: implement uvd_v7_0_(enc_|)ring_emit_reg_wait

[Felix Kuehling]

Suggestion inline ...


On 2018-01-26 03:13 PM, Christian König wrote:
> Add emit_reg_wait implementation for UVD v7.
>
> Signed-off-by: Christian König <christian.koenig at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 40 +++++++++++++++++++++--------------
>  1 file changed, 24 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
> index d317c764cc91..b8fbc7dc626f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
> @@ -1241,17 +1241,17 @@ static void uvd_v7_0_ring_emit_wreg(struct amdgpu_ring *ring,
>  	amdgpu_ring_write(ring, 8);
>  }
>  
> -static void uvd_v7_0_vm_reg_wait(struct amdgpu_ring *ring,
> -				uint32_t data0, uint32_t data1, uint32_t mask)
> +static void uvd_v7_0_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
> +					uint32_t val, uint32_t mask)
>  {
>  	struct amdgpu_device *adev = ring->adev;
>  
>  	amdgpu_ring_write(ring,
>  		PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0));
> -	amdgpu_ring_write(ring, data0);
> +	amdgpu_ring_write(ring, reg << 2);
>  	amdgpu_ring_write(ring,
>  		PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA1), 0));
> -	amdgpu_ring_write(ring, data1);
> +	amdgpu_ring_write(ring, val);
>  	amdgpu_ring_write(ring,
>  		PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GP_SCRATCH8), 0));
>  	amdgpu_ring_write(ring, mask);
> @@ -1271,16 +1271,16 @@ static void uvd_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
>  	pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pasid, pd_addr);
>  
>  	/* wait for reg writes */
> -	data0 = (hub->ctx0_ptb_addr_lo32 + vmid * 2) << 2;
> +	data0 = hub->ctx0_ptb_addr_lo32 + vmid * 2;
>  	data1 = lower_32_bits(pd_addr);
>  	mask = 0xffffffff;
> -	uvd_v7_0_vm_reg_wait(ring, data0, data1, mask);
> +	uvd_v7_0_ring_emit_reg_wait(ring, data0, data1, mask);
>  
>  	/* wait for flush */
> -	data0 = (hub->vm_inv_eng0_ack + eng) << 2;
> +	data0 = hub->vm_inv_eng0_ack + eng;
>  	data1 = 1 << vmid;
>  	mask =  1 << vmid;
> -	uvd_v7_0_vm_reg_wait(ring, data0, data1, mask);
> +	uvd_v7_0_ring_emit_reg_wait(ring, data0, data1, mask);
>  }
>  
>  static void uvd_v7_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
> @@ -1308,16 +1308,12 @@ static void uvd_v7_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
>  	pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pasid, pd_addr);
>  
>  	/* wait for reg writes */
> -	amdgpu_ring_write(ring, HEVC_ENC_CMD_REG_WAIT);
> -	amdgpu_ring_write(ring,	(hub->ctx0_ptb_addr_lo32 + vmid * 2) << 2);
> -	amdgpu_ring_write(ring, 0xffffffff);
> -	amdgpu_ring_write(ring, lower_32_bits(pd_addr));
> +	amdgpu_ring_emit_reg_wait(ring, hub->ctx0_ptb_addr_lo32 + vmid * 2,
> +				  lower_32_bits(pd_addr), 0xffffffff);

You could call uvd_v7_0_ring_emit_reg_wait directly here and save
yourself an indirect call. It would also allow the compiler to inline it
if appropriate.

>  
>  	/* wait for flush */
> -	amdgpu_ring_write(ring, HEVC_ENC_CMD_REG_WAIT);
> -	amdgpu_ring_write(ring, (hub->vm_inv_eng0_ack + eng) << 2);
> -	amdgpu_ring_write(ring, 1 << vmid);
> -	amdgpu_ring_write(ring, 1 << vmid);
> +	amdgpu_ring_emit_reg_wait(ring, hub->vm_inv_eng0_ack + eng,
> +				  1 << vmid, 1 << vmid);

Same as above.

Regards,
  Felix

>  }
>  
>  static void uvd_v7_0_enc_ring_emit_wreg(struct amdgpu_ring *ring,
> @@ -1328,6 +1324,16 @@ static void uvd_v7_0_enc_ring_emit_wreg(struct amdgpu_ring *ring,
>  	amdgpu_ring_write(ring, val);
>  }
>  
> +static void uvd_v7_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring,
> +					    uint32_t reg, uint32_t val,
> +					    uint32_t mask)
> +{
> +	amdgpu_ring_write(ring, HEVC_ENC_CMD_REG_WAIT);
> +	amdgpu_ring_write(ring,	reg << 2);
> +	amdgpu_ring_write(ring, mask);
> +	amdgpu_ring_write(ring, val);
> +}
> +
>  #if 0
>  static bool uvd_v7_0_is_idle(void *handle)
>  {
> @@ -1676,6 +1682,7 @@ static const struct amdgpu_ring_funcs uvd_v7_0_ring_vm_funcs = {
>  	.begin_use = amdgpu_uvd_ring_begin_use,
>  	.end_use = amdgpu_uvd_ring_end_use,
>  	.emit_wreg = uvd_v7_0_ring_emit_wreg,
> +	.emit_reg_wait = uvd_v7_0_ring_emit_reg_wait,
>  };
>  
>  static const struct amdgpu_ring_funcs uvd_v7_0_enc_ring_vm_funcs = {
> @@ -1704,6 +1711,7 @@ static const struct amdgpu_ring_funcs uvd_v7_0_enc_ring_vm_funcs = {
>  	.begin_use = amdgpu_uvd_ring_begin_use,
>  	.end_use = amdgpu_uvd_ring_end_use,
>  	.emit_wreg = uvd_v7_0_enc_ring_emit_wreg,
> +	.emit_reg_wait = uvd_v7_0_enc_ring_emit_reg_wait,
>  };
>  
>  static void uvd_v7_0_set_ring_funcs(struct amdgpu_device *adev)