[PATCH 3/4] drm/amd/pp: Enable pp_set_power_profile_mode under manual mode

[Rex Zhu]

Only user enter manual performance mode, driver allow user
configure the sclk/mclk dpm parameters through sysfs
pp_power_profile_mode.

Change-Id: I97aa7d30ebba3a672d4976c257683c927d30d25c
Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
---
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index 2aa0731..13879d2 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -1088,6 +1088,7 @@ static int pp_set_power_profile_mode(void *handle, long *input, uint32_t size)
 {
 	struct pp_hwmgr *hwmgr;
 	struct pp_instance *pp_handle = (struct pp_instance *)handle;
+	int ret = -EINVAL;
 
 	if (pp_check(pp_handle))
 		return -EINVAL;
@@ -1098,8 +1099,11 @@ static int pp_set_power_profile_mode(void *handle, long *input, uint32_t size)
 		pr_info("%s was not implemented.\n", __func__);
 		return -EINVAL;
 	}
-
-	return hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, input, size);
+	mutex_lock(&pp_handle->pp_lock);
+	if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL)
+		ret = hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, input, size);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_odn_edit_dpm_table(void *handle, uint32_t type, long *input, uint32_t size)
-- 
1.9.1