[PATCH 23/27] drm/amd/display: resume from S3 bypass power down HW block.
Harry Wentland
harry.wentland at amd.com
Wed Jan 31 15:59:22 UTC 2018
From: Charlene Liu <charlene.liu at amd.com>
Signed-off-by: Charlene Liu <charlene.liu at amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac at amd.com>
Acked-by: Harry Wentland <harry.wentland at amd.com>
---
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c | 1 +
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 7 +++++++
.../drm/amd/display/dc/bios/bios_parser_helper.c | 8 ++++++++
.../drm/amd/display/dc/bios/bios_parser_helper.h | 1 +
drivers/gpu/drm/amd/display/dc/dc_bios_types.h | 3 +++
.../amd/display/dc/dce110/dce110_hw_sequencer.c | 23 +++++++++++-----------
.../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 1 +
7 files changed, 33 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
index c00e405b63e8..fb3cceec1a7f 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
@@ -3803,6 +3803,7 @@ static const struct dc_vbios_funcs vbios_funcs = {
/* bios scratch register communication */
.is_accelerated_mode = bios_is_accelerated_mode,
+ .get_vga_enabled_displays = bios_get_vga_enabled_displays,
.set_scratch_critical_state = bios_parser_set_scratch_critical_state,
diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
index 1ee1717f2e6f..1689c670ca6f 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
@@ -1280,6 +1280,12 @@ static bool bios_parser_is_accelerated_mode(
return bios_is_accelerated_mode(dcb);
}
+static uint32_t bios_parser_get_vga_enabled_displays(
+ struct dc_bios *bios)
+{
+ return bios_get_vga_enabled_displays(bios);
+}
+
/**
* bios_parser_set_scratch_critical_state
@@ -1800,6 +1806,7 @@ static const struct dc_vbios_funcs vbios_funcs = {
.is_accelerated_mode = bios_parser_is_accelerated_mode,
+ .get_vga_enabled_displays = bios_parser_get_vga_enabled_displays,
.set_scratch_critical_state = bios_parser_set_scratch_critical_state,
diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.c
index 5c9e5108c32c..d4589470985c 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.c
@@ -78,5 +78,13 @@ void bios_set_scratch_critical_state(
REG_UPDATE(BIOS_SCRATCH_6, S6_CRITICAL_STATE, critial_state);
}
+uint32_t bios_get_vga_enabled_displays(
+ struct dc_bios *bios)
+{
+ uint32_t active_disp = 1;
+ if (bios->regs->BIOS_SCRATCH_3) /*follow up with other asic, todo*/
+ active_disp = REG_READ(BIOS_SCRATCH_3) & 0XFFFF;
+ return active_disp;
+}
diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.h b/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.h
index c0047efeb006..75a29e68fb27 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.h
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.h
@@ -34,6 +34,7 @@ uint8_t *bios_get_image(struct dc_bios *bp, uint32_t offset,
bool bios_is_accelerated_mode(struct dc_bios *bios);
void bios_set_scratch_acc_mode_change(struct dc_bios *bios);
void bios_set_scratch_critical_state(struct dc_bios *bios, bool state);
+uint32_t bios_get_vga_enabled_displays(struct dc_bios *bios);
#define GET_IMAGE(type, offset) ((type *) bios_get_image(&bp->base, offset, sizeof(type)))
diff --git a/drivers/gpu/drm/amd/display/dc/dc_bios_types.h b/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
index 273d80a4ebce..d9b84ec7954c 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
@@ -111,6 +111,8 @@ struct dc_vbios_funcs {
struct dc_bios *bios);
bool (*is_accelerated_mode)(
struct dc_bios *bios);
+ uint32_t (*get_vga_enabled_displays)(
+ struct dc_bios *bios);
void (*get_bios_event_info)(
struct dc_bios *bios,
struct bios_event_info *info);
@@ -199,6 +201,7 @@ struct dc_vbios_funcs {
};
struct bios_registers {
+ uint32_t BIOS_SCRATCH_3;
uint32_t BIOS_SCRATCH_6;
};
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index bc1c4546ef69..b87974e2a41b 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1484,20 +1484,21 @@ static struct dc_link *get_link_for_edp_not_in_use(
*/
void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context)
{
+ struct dc_bios *dcb = dc->ctx->dc_bios;
struct dc_link *edp_link_to_turnoff = get_link_for_edp_not_in_use(dc, context);
struct dc_link *edp_link = get_link_for_edp(dc);
-
- if (edp_link)
- /*we need turn off backlight before DP_blank and encoder powered down*/
- dc->hwss.edp_backlight_control(edp_link, false);
-
- power_down_all_hw_blocks(dc);
- disable_vga_and_power_gate_all_controllers(dc);
-
- if (edp_link_to_turnoff)
- dc->hwss.edp_power_control(edp_link_to_turnoff, false);
-
+ if (dcb->funcs->get_vga_enabled_displays(dc->ctx->dc_bios) != 0) {
+ if (edp_link_to_turnoff) {
+ /*we need turn off backlight before DP_blank and encoder powered down, todo add optimization*/
+ dc->hwss.edp_backlight_control(edp_link, false);
+ }
+ /*resume from S3, no vbios posting, no need to power down again*/
+ power_down_all_hw_blocks(dc);
+ disable_vga_and_power_gate_all_controllers(dc);
+ if (edp_link_to_turnoff)
+ dc->hwss.edp_power_control(edp_link_to_turnoff, false);
+ }
bios_set_scratch_acc_mode_change(dc->ctx->dc_bios);
}
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
index 17dd222f82fe..c4a564cb56b9 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
@@ -366,6 +366,7 @@ static const struct dcn_optc_mask tg_mask = {
static const struct bios_registers bios_regs = {
+ NBIO_SR(BIOS_SCRATCH_3),
NBIO_SR(BIOS_SCRATCH_6)
};
--
2.14.1
More information about the amd-gfx
mailing list