[PATCH] drm/amd/display: Make function pointer structs const
Christian König
ckoenig.leichtzumerken at gmail.com
Fri Jul 6 14:33:39 UTC 2018
Am 06.07.2018 um 16:22 schrieb Harry Wentland:
> const to avoid hard-to-find bugs where some function overrides a
> function pointer.
>
> Signed-off-by: Harry Wentland <harry.wentland at amd.com>
Reviewed-by: Christian König <christian.koenig at amd.com>
> ---
> drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 2 +-
> drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c | 2 +-
> drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c | 2 +-
> drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 4 ++--
> drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h | 2 +-
> 5 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
> index 8b124948c3d0..5f686aa8fc84 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
> @@ -1139,7 +1139,7 @@ void hubp1_vtg_sel(struct hubp *hubp, uint32_t otg_inst)
> REG_UPDATE(DCHUBP_CNTL, HUBP_VTG_SEL, otg_inst);
> }
>
> -static struct hubp_funcs dcn10_hubp_funcs = {
> +static const struct hubp_funcs dcn10_hubp_funcs = {
> .hubp_program_surface_flip_and_addr =
> hubp1_program_surface_flip_and_addr,
> .hubp_program_surface_config =
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
> index 9ca51ae46de7..958994edf2c4 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
> @@ -428,7 +428,7 @@ void mpc1_read_mpcc_state(
> MPCC_BUSY, &s->busy);
> }
>
> -const struct mpc_funcs dcn10_mpc_funcs = {
> +static const struct mpc_funcs dcn10_mpc_funcs = {
> .read_mpcc_state = mpc1_read_mpcc_state,
> .insert_plane = mpc1_insert_plane,
> .remove_mpcc = mpc1_remove_mpcc,
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c
> index 77a1a9d541a4..ab958cff3b76 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c
> @@ -385,7 +385,7 @@ void opp1_destroy(struct output_pixel_processor **opp)
> *opp = NULL;
> }
>
> -static struct opp_funcs dcn10_opp_funcs = {
> +static const struct opp_funcs dcn10_opp_funcs = {
> .opp_set_dyn_expansion = opp1_set_dyn_expansion,
> .opp_program_fmt = opp1_program_fmt,
> .opp_program_bit_depth_reduction = opp1_program_bit_depth_reduction,
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
> index 771e0cf29bba..84581b3c392b 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
> @@ -1035,11 +1035,11 @@ static enum dc_status dcn10_validate_plane(const struct dc_plane_state *plane_st
> return DC_OK;
> }
>
> -static struct dc_cap_funcs cap_funcs = {
> +static const struct dc_cap_funcs cap_funcs = {
> .get_dcc_compression_cap = dcn10_get_dcc_compression_cap
> };
>
> -static struct resource_funcs dcn10_res_pool_funcs = {
> +static const struct resource_funcs dcn10_res_pool_funcs = {
> .destroy = dcn10_destroy_resource_pool,
> .link_enc_create = dcn10_link_encoder_create,
> .validate_bandwidth = dcn_validate_bandwidth,
> diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
> index 97df82cddf82..5b7976f6861a 100644
> --- a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
> +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
> @@ -43,7 +43,7 @@ enum cursor_lines_per_chunk {
> };
>
> struct hubp {
> - struct hubp_funcs *funcs;
> + const struct hubp_funcs *funcs;
> struct dc_context *ctx;
> struct dc_plane_address request_address;
> struct dc_plane_address current_address;
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