[PATCH libdrm] amdgpu: add amdgpu_bo_handle_type_kms_noimport

[zhoucm1]

On 2018年07月12日 08:47, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak at amd.com>
less patch comment to describe why amdgpu_bo_handle_type_kms doesn't 
meet requriement and what patch does.
less Signed-off-by.

>
> ---
>   amdgpu/amdgpu.h    | 7 ++++++-
>   amdgpu/amdgpu_bo.c | 4 ++++
>   2 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
> index 36f91058..be83b457 100644
> --- a/amdgpu/amdgpu.h
> +++ b/amdgpu/amdgpu.h
> @@ -77,21 +77,26 @@ struct drm_amdgpu_info_hw_ip;
>    *
>   */
>   enum amdgpu_bo_handle_type {
>   	/** GEM flink name (needs DRM authentication, used by DRI2) */
>   	amdgpu_bo_handle_type_gem_flink_name = 0,
>   
>   	/** KMS handle which is used by all driver ioctls */
>   	amdgpu_bo_handle_type_kms = 1,
>   
>   	/** DMA-buf fd handle */
> -	amdgpu_bo_handle_type_dma_buf_fd = 2
> +	amdgpu_bo_handle_type_dma_buf_fd = 2,
> +
> +	/** KMS handle, but re-importing as a DMABUF handle through
> +	 *  drmPrimeHandleToFD is forbidden. (Glamor does that)
> +	 */
> +	amdgpu_bo_handle_type_kms_noimport = 3,
I'm always curious that these enum members are lowercase, could we 
change them to uppercase by this time?

Thanks,
David Zhou
>   };
>   
>   /** Define known types of GPU VM VA ranges */
>   enum amdgpu_gpu_va_range
>   {
>   	/** Allocate from "normal"/general range */
>   	amdgpu_gpu_va_range_general = 0
>   };
>   
>   enum amdgpu_sw_info {
> diff --git a/amdgpu/amdgpu_bo.c b/amdgpu/amdgpu_bo.c
> index 9e37b149..d29be244 100644
> --- a/amdgpu/amdgpu_bo.c
> +++ b/amdgpu/amdgpu_bo.c
> @@ -234,20 +234,22 @@ int amdgpu_bo_export(amdgpu_bo_handle bo,
>   	case amdgpu_bo_handle_type_gem_flink_name:
>   		r = amdgpu_bo_export_flink(bo);
>   		if (r)
>   			return r;
>   
>   		*shared_handle = bo->flink_name;
>   		return 0;
>   
>   	case amdgpu_bo_handle_type_kms:
>   		amdgpu_add_handle_to_table(bo);
> +		/* fall through */
> +	case amdgpu_bo_handle_type_kms_noimport:
>   		*shared_handle = bo->handle;
>   		return 0;
>   
>   	case amdgpu_bo_handle_type_dma_buf_fd:
>   		amdgpu_add_handle_to_table(bo);
>   		return drmPrimeHandleToFD(bo->dev->fd, bo->handle,
>   					  DRM_CLOEXEC | DRM_RDWR,
>   					  (int*)shared_handle);
>   	}
>   	return -EINVAL;
> @@ -299,20 +301,21 @@ int amdgpu_bo_import(amdgpu_device_handle dev,
>   		bo = util_hash_table_get(dev->bo_flink_names,
>   					 (void*)(uintptr_t)shared_handle);
>   		break;
>   
>   	case amdgpu_bo_handle_type_dma_buf_fd:
>   		bo = util_hash_table_get(dev->bo_handles,
>   					 (void*)(uintptr_t)shared_handle);
>   		break;
>   
>   	case amdgpu_bo_handle_type_kms:
> +	case amdgpu_bo_handle_type_kms_noimport:
>   		/* Importing a KMS handle in not allowed. */
>   		pthread_mutex_unlock(&dev->bo_table_mutex);
>   		return -EPERM;
>   
>   	default:
>   		pthread_mutex_unlock(&dev->bo_table_mutex);
>   		return -EINVAL;
>   	}
>   
>   	if (bo) {
> @@ -368,20 +371,21 @@ int amdgpu_bo_import(amdgpu_device_handle dev,
>   		util_hash_table_set(dev->bo_flink_names,
>   				    (void*)(uintptr_t)bo->flink_name, bo);
>   		break;
>   
>   	case amdgpu_bo_handle_type_dma_buf_fd:
>   		bo->handle = shared_handle;
>   		bo->alloc_size = dma_buf_size;
>   		break;
>   
>   	case amdgpu_bo_handle_type_kms:
> +	case amdgpu_bo_handle_type_kms_noimport:
>   		assert(0); /* unreachable */
>   	}
>   
>   	/* Initialize it. */
>   	atomic_set(&bo->refcount, 1);
>   	bo->dev = dev;
>   	pthread_mutex_init(&bo->cpu_access_mutex, NULL);
>   
>   	util_hash_table_set(dev->bo_handles, (void*)(uintptr_t)bo->handle, bo);
>   	pthread_mutex_unlock(&dev->bo_table_mutex);