[PATCH 1/2] drm/amd/pp: Set Max clock level to display by default

[Zhu, Rex]

>shouldn't we still assign simple_clocks.level to clocks->max_clocks_state if it's non-zero?

Yes, Thanks for your reminding.


Best Regards

Rex



________________________________
From: Wentland, Harry
Sent: Wednesday, July 18, 2018 2:29 AM
To: Zhu, Rex; amd-gfx at lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/amd/pp: Set Max clock level to display by default



On 2018-07-17 08:36 AM, Rex Zhu wrote:
> avoid the error in dmesg:
> [drm:dm_pp_get_static_clocks]
> *ERROR* DM_PPLIB: invalid powerlevel state: 0!
>
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
> ---
>  drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index 75c2082..63adcd1 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -998,7 +998,7 @@ static int pp_get_display_power_level(void *handle,
>  static int pp_get_current_clocks(void *handle,
>                struct amd_pp_clock_info *clocks)
>  {
> -     struct amd_pp_simple_clock_info simple_clocks;
> +     struct amd_pp_simple_clock_info simple_clocks = { 0 };
>        struct pp_clock_info hw_clocks;
>        struct pp_hwmgr *hwmgr = handle;
>        int ret = 0;
> @@ -1034,7 +1034,8 @@ static int pp_get_current_clocks(void *handle,
>        clocks->max_engine_clock_in_sr = hw_clocks.max_eng_clk;
>        clocks->min_engine_clock_in_sr = hw_clocks.min_eng_clk;
>
> -     clocks->max_clocks_state = simple_clocks.level;
> +     if (simple_clocks.level == 0)
> +             clocks->max_clocks_state = PP_DAL_POWERLEVEL_7;

shouldn't we still assign simple_clocks.level to clocks->max_clocks_state if it's non-zero?

Harry

>
>        if (0 == phm_get_current_shallow_sleep_clocks(hwmgr, &hwmgr->current_ps->hardware, &hw_clocks)) {
>                clocks->max_engine_clock_in_sr = hw_clocks.max_eng_clk;
> @@ -1137,6 +1138,8 @@ static int pp_get_display_mode_validation_clocks(void *handle,
>        if (!hwmgr || !hwmgr->pm_en ||!clocks)
>                return -EINVAL;
>
> +     clocks->level = PP_DAL_POWERLEVEL_7;
> +
>        mutex_lock(&hwmgr->smu_lock);
>
>        if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DynamicPatchPowerState))
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.freedesktop.org/archives/amd-gfx/attachments/20180718/54be7e4b/attachment.html>