[PATCH 3/3] drm/amd/powerplay: disallow slow switch if NBPState is disabled

[Quan, Evan]

Sent out the revised patch.

Regards,
Evan
From: Zhu, Rex
Sent: Friday, July 20, 2018 6:08 PM
To: Quan, Evan <Evan.Quan at amd.com>; amd-gfx at lists.freedesktop.org
Subject: Re: [PATCH 3/3] drm/amd/powerplay: disallow slow switch if NBPState is disabled


Hi Evan，



Changing the title to "Only allow slow switch if NB pstate switch is enabled"   can make patch more

understandable.





Best Regards

Rex

________________________________
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org<mailto:amd-gfx-bounces at lists.freedesktop.org>> on behalf of Zhu, Rex <Rex.Zhu at amd.com<mailto:Rex.Zhu at amd.com>>
Sent: Friday, July 20, 2018 4:43 PM
To: Quan, Evan; amd-gfx at lists.freedesktop.org<mailto:amd-gfx at lists.freedesktop.org>
Subject: Re: [PATCH 3/3] drm/amd/powerplay: disallow slow switch if NBPState is disabled


+       bool uclk_switching_disabled =
+(bool)hwmgr->display_config->nb_pstate_switch_disable;



Don't need type convert.



Best Regards

Rex

________________________________
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org<mailto:amd-gfx-bounces at lists.freedesktop.org>> on behalf of Evan Quan <evan.quan at amd.com<mailto:evan.quan at amd.com>>
Sent: Friday, July 20, 2018 10:35 AM
To: amd-gfx at lists.freedesktop.org<mailto:amd-gfx at lists.freedesktop.org>
Cc: Quan, Evan; Zhu, Rex
Subject: [PATCH 3/3] drm/amd/powerplay: disallow slow switch if NBPState is disabled

Otherwise there may be potential SMU performance issues.

Change-Id: I05a09bb05407f7b3705d79a1d2c6628385c80461
Signed-off-by: Evan Quan <evan.quan at amd.com<mailto:evan.quan at amd.com>>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 5 ++++-
 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 5 ++++-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 002ed77a5268..ccb587607b03 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -3779,9 +3779,12 @@ static int vega10_notify_smc_display_config_after_ps_adjustment(
         struct PP_Clocks min_clocks = {0};
         uint32_t i;
         struct pp_display_clock_request clock_req;
+       bool uclk_switching_disabled =
+                       (bool)hwmgr->display_config->nb_pstate_switch_disable;

         if ((hwmgr->display_config->num_display > 1) &&
-            !hwmgr->display_config->multi_monitor_in_sync)
+            !hwmgr->display_config->multi_monitor_in_sync &&
+            !uclk_switching_disabled)
                 vega10_notify_smc_display_change(hwmgr, false);
         else
                 vega10_notify_smc_display_change(hwmgr, true);
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
index 35f96dacb50a..e3b11ae8fdb8 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
@@ -1387,9 +1387,12 @@ static int vega12_notify_smc_display_config_after_ps_adjustment(
                         (struct vega12_hwmgr *)(hwmgr->backend);
         struct PP_Clocks min_clocks = {0};
         struct pp_display_clock_request clock_req;
+       bool uclk_switching_disabled =
+                       (bool)hwmgr->display_config->nb_pstate_switch_disable;

         if ((hwmgr->display_config->num_display > 1) &&
-               !hwmgr->display_config->multi_monitor_in_sync)
+            !hwmgr->display_config->multi_monitor_in_sync &&
+            !uclk_switching_disabled)
                 vega12_notify_smc_display_change(hwmgr, false);
         else
                 vega12_notify_smc_display_change(hwmgr, true);
--
2.18.0

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