[PATCH] drm/amdgpu: correct GART location info

Christian König ckoenig.leichtzumerken at gmail.com
Tue Jun 19 07:04:42 UTC 2018


We need a commit message, something like "Avoid confusing the GART with 
the GTT domain.".

Am 19.06.2018 um 06:41 schrieb Junwei Zhang:
> Signed-off-by: Junwei Zhang <Jerry.Zhang at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 14 +++++++-------
>   1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index f77b07b..f9fe8d3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -676,17 +676,17 @@ void amdgpu_device_vram_location(struct amdgpu_device *adev,
>   }
>   
>   /**
> - * amdgpu_device_gart_location - try to find GTT location
> + * amdgpu_device_gart_location - try to find GART location
>    *
>    * @adev: amdgpu device structure holding all necessary informations
>    * @mc: memory controller structure holding memory informations
>    *
> - * Function will place try to place GTT before or after VRAM.
> + * Function will place try to place GART before or after VRAM.
>    *
> - * If GTT size is bigger than space left then we ajust GTT size.
> + * If GART size is bigger than space left then we ajust GART size.
>    * Thus function will never fails.
>    *
> - * FIXME: when reducing GTT size align new size on power of 2.
> + * FIXME: when reducing GART size align new size on power of 2.

Please just drop this line. IIRC we actually don't align the gartsize 
parameter to power of two any more either.

With that fixed the patch is Reviewed-by: Christian König 
<christian.koenig at amd.com>.

Thanks,
Christian.

>    */
>   void amdgpu_device_gart_location(struct amdgpu_device *adev,
>   				 struct amdgpu_gmc *mc)
> @@ -699,13 +699,13 @@ void amdgpu_device_gart_location(struct amdgpu_device *adev,
>   	size_bf = mc->vram_start;
>   	if (size_bf > size_af) {
>   		if (mc->gart_size > size_bf) {
> -			dev_warn(adev->dev, "limiting GTT\n");
> +			dev_warn(adev->dev, "limiting GART\n");
>   			mc->gart_size = size_bf;
>   		}
>   		mc->gart_start = 0;
>   	} else {
>   		if (mc->gart_size > size_af) {
> -			dev_warn(adev->dev, "limiting GTT\n");
> +			dev_warn(adev->dev, "limiting GART\n");
>   			mc->gart_size = size_af;
>   		}
>   		/* VCE doesn't like it when BOs cross a 4GB segment, so align
> @@ -714,7 +714,7 @@ void amdgpu_device_gart_location(struct amdgpu_device *adev,
>   		mc->gart_start = ALIGN(mc->vram_end + 1, 0x100000000ULL);
>   	}
>   	mc->gart_end = mc->gart_start + mc->gart_size - 1;
> -	dev_info(adev->dev, "GTT: %lluM 0x%016llX - 0x%016llX\n",
> +	dev_info(adev->dev, "GART: %lluM 0x%016llX - 0x%016llX\n",
>   			mc->gart_size >> 20, mc->gart_start, mc->gart_end);
>   }
>   



More information about the amd-gfx mailing list