[PATCH v2 2/2] drm/amdgpu: Add parsing SQ_EDC_INFO to SQ IH v2.

[Andrey Grodzovsky]

Are you referring to insert_work->smp_mb(); ?

Andrey


On 06/20/2018 10:50 AM, Christian König wrote:
>> +     * Try to submit work so SQ_EDC_INFO can be accessed from
>> +     * BH. If previous work submission hasn't finished yet
>> +     * just print whatever info is possible directly from the ISR.
>> +     */
>> +    if (work_pending(&adev->gfx.sq_work.work)) {
>> +        gfx_v8_0_parse_sq_irq(adev, ih_data);
>> +    } else {
>> +        adev->gfx.sq_work.ih_data = ih_data;
>> +        /* Verify the new value visible in BH handler */
>> +        smp_wmb();
>
> You can drop the barrier here and in gfx_v8_0_sq_irq_work_func(), the 
> schedule_work() function is a barrier itself for both reads and writes 
> anyway.
>
> Apart from that the both patches are Acked-by: Christian König 
> <christian.koenig at amd.com>.
>
> Regards,
> Christian. 

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