[PATCH 1/2] drm/amd/pp: Fix function parameter not correct

Rex Zhu Rex.Zhu at amd.com
Tue Mar 13 07:00:49 UTC 2018


caused by "commit dcefb7668e5b4fb56099b16d1790cd3056322b03"

Change-Id: I6ed04a5a5ddfedc64a143f12d6ef6a7b9f7f9760
Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
---
 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
index 15ae900..5d12d2e 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
@@ -234,10 +234,10 @@ static int smu10_smu_fini(struct pp_hwmgr *hwmgr)
 		smu10_smc_disable_vcn(hwmgr);
 		amdgpu_bo_free_kernel(&priv->smu_tables.entry[SMU10_WMTABLE].handle,
 					&priv->smu_tables.entry[SMU10_WMTABLE].mc_addr,
-					priv->smu_tables.entry[SMU10_WMTABLE].table);
+					&priv->smu_tables.entry[SMU10_WMTABLE].table);
 		amdgpu_bo_free_kernel(&priv->smu_tables.entry[SMU10_CLOCKTABLE].handle,
 					&priv->smu_tables.entry[SMU10_CLOCKTABLE].mc_addr,
-					priv->smu_tables.entry[SMU10_CLOCKTABLE].table);
+					&priv->smu_tables.entry[SMU10_CLOCKTABLE].table);
 		kfree(hwmgr->smu_backend);
 		hwmgr->smu_backend = NULL;
 	}
-- 
1.9.1



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