[PATCH 16/42] drm/amdgpu/gmc9: fix vega12's athub&mmhub golden setting.
Alex Deucher
alexdeucher at gmail.com
Wed Mar 21 14:44:44 UTC 2018
On Wed, Mar 21, 2018 at 10:19 AM, Christian König
<ckoenig.leichtzumerken at gmail.com> wrote:
> Am 21.03.2018 um 14:46 schrieb Alex Deucher:
>>
>> From: Feifei Xu <Feifei.Xu at amd.com>
>>
>> The athub&mmhub's golden setting is for vega10 only now.
>> Remove this from vega12, which is introduced by branch merge.
>>
>> Signed-off-by: Feifei Xu <Feifei.Xu at amd.com>
>> Reviewed-by: Ken Wang <ken.wang at amd.com>
>> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
>
>
> Shouldn't that one be squashed into the predecessor?
Yes, I'll squash it in. thanks!
Alex
>
> Christian.
>
>
>> ---
>> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> index c4467742badd..e687363900bb 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> @@ -960,7 +960,6 @@ static void gmc_v9_0_init_golden_registers(struct
>> amdgpu_device *adev)
>> switch (adev->asic_type) {
>> case CHIP_VEGA10:
>> - case CHIP_VEGA12:
>> soc15_program_register_sequence(adev,
>>
>> golden_settings_mmhub_1_0_0,
>>
>> ARRAY_SIZE(golden_settings_mmhub_1_0_0));
>> @@ -968,6 +967,8 @@ static void gmc_v9_0_init_golden_registers(struct
>> amdgpu_device *adev)
>>
>> golden_settings_athub_1_0_0,
>>
>> ARRAY_SIZE(golden_settings_athub_1_0_0));
>> break;
>> + case CHIP_VEGA12:
>> + break;
>> case CHIP_RAVEN:
>> soc15_program_register_sequence(adev,
>>
>> golden_settings_athub_1_0_0,
>
>
More information about the amd-gfx
mailing list