[PATCH 4/6] drm/amd/pp: Save vf state in pp context
Alex Deucher
alexdeucher at gmail.com
Thu Mar 22 13:21:14 UTC 2018
On Thu, Mar 22, 2018 at 7:40 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> Change-Id: Ic77e961317113942023b25523df6a4399535fb06
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
Please include a patch description. E.g.,
Store vf state in pp_context so we can deprecate the cgs interface.
> ---
> drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 3 ++-
> drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 +
> drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 7 +++----
> drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c | 3 +--
> drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 10 +++++-----
> drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | 3 +--
> 6 files changed, 13 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index 1ae4905..5717859 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -46,7 +46,8 @@ static int amd_powerplay_create(struct amdgpu_device *adev)
> return -ENOMEM;
>
> hwmgr->adev = adev;
> - hwmgr->pm_en = (amdgpu_dpm != 0 && !amdgpu_sriov_vf(adev)) ? true : false;
> + hwmgr->not_vf = !amdgpu_sriov_vf(adev);
> + hwmgr->pm_en = (amdgpu_dpm && hwmgr->not_vf) ? true : false;
This should be part of patch 2. With these comments addressed the patch is:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> hwmgr->device = amdgpu_cgs_create_device(adev);
> mutex_init(&hwmgr->smu_lock);
> hwmgr->chip_family = adev->family;
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> index d6c9a3b..d5cadc6 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> @@ -718,6 +718,7 @@ struct pp_hwmgr {
> uint32_t chip_family;
> uint32_t chip_id;
> uint32_t smu_version;
> + bool not_vf;
> bool pm_en;
> struct mutex smu_lock;
>
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
> index faef783..35b947e 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
> @@ -288,8 +288,7 @@ static int fiji_start_smu(struct pp_hwmgr *hwmgr)
> struct fiji_smumgr *priv = (struct fiji_smumgr *)(hwmgr->smu_backend);
>
> /* Only start SMC if SMC RAM is not running */
> - if (!(smu7_is_smc_ram_running(hwmgr)
> - || cgs_is_virtualization_enabled(hwmgr->device))) {
> + if (!smu7_is_smc_ram_running(hwmgr) && hwmgr->not_vf) {
> /* Check if SMU is running in protected mode */
> if (0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,
> CGS_IND_REG__SMC,
> @@ -335,8 +334,8 @@ static bool fiji_is_hw_avfs_present(struct pp_hwmgr *hwmgr)
> uint32_t efuse = 0;
> uint32_t mask = (1 << ((AVFS_EN_MSB - AVFS_EN_LSB) + 1)) - 1;
>
> - if (cgs_is_virtualization_enabled(hwmgr->device))
> - return 0;
> + if (!hwmgr->not_vf)
> + return false;
>
> if (!atomctrl_read_efuse(hwmgr->device, AVFS_EN_LSB, AVFS_EN_MSB,
> mask, &efuse)) {
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
> index 997a777..b861c26 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
> @@ -295,8 +295,7 @@ static int polaris10_start_smu(struct pp_hwmgr *hwmgr)
> struct polaris10_smumgr *smu_data = (struct polaris10_smumgr *)(hwmgr->smu_backend);
>
> /* Only start SMC if SMC RAM is not running */
> - if (!(smu7_is_smc_ram_running(hwmgr)
> - || cgs_is_virtualization_enabled(hwmgr->device))) {
> + if (!smu7_is_smc_ram_running(hwmgr) && hwmgr->not_vf) {
> smu_data->protected_mode = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_MODE));
> smu_data->smu7_data.security_hard_key = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_SEL));
>
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
> index 0399c10..3684822 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
> @@ -375,7 +375,7 @@ static int smu7_populate_single_firmware_entry(struct pp_hwmgr *hwmgr,
> entry->meta_data_addr_low = 0;
>
> /* digest need be excluded out */
> - if (cgs_is_virtualization_enabled(hwmgr->device))
> + if (!hwmgr->not_vf)
> info.image_size -= 20;
> entry->data_size_byte = info.image_size;
> entry->num_register_entries = 0;
> @@ -409,7 +409,7 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr)
> 0x0);
>
> if (hwmgr->chip_id > CHIP_TOPAZ) { /* add support for Topaz */
> - if (!cgs_is_virtualization_enabled(hwmgr->device)) {
> + if (hwmgr->not_vf) {
> smu7_send_msg_to_smc_with_parameter(hwmgr,
> PPSMC_MSG_SMU_DRAM_ADDR_HI,
> upper_32_bits(smu_data->smu_buffer.mc_addr));
> @@ -467,7 +467,7 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr)
> PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
> UCODE_ID_SDMA1, &toc->entry[toc->num_entries++]),
> "Failed to Get Firmware Entry.", return -EINVAL);
> - if (cgs_is_virtualization_enabled(hwmgr->device))
> + if (!hwmgr->not_vf)
> PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
> UCODE_ID_MEC_STORAGE, &toc->entry[toc->num_entries++]),
> "Failed to Get Firmware Entry.", return -EINVAL);
> @@ -608,7 +608,7 @@ int smu7_init(struct pp_hwmgr *hwmgr)
> smu_data->header = smu_data->header_buffer.kaddr;
> smu_data->header_buffer.mc_addr = mc_addr;
>
> - if (cgs_is_virtualization_enabled(hwmgr->device))
> + if (!hwmgr->not_vf)
> return 0;
>
> smu_data->smu_buffer.data_size = 200*4096;
> @@ -643,7 +643,7 @@ int smu7_smu_fini(struct pp_hwmgr *hwmgr)
> &smu_data->header_buffer.mc_addr,
> &smu_data->header_buffer.kaddr);
>
> - if (!cgs_is_virtualization_enabled(hwmgr->device))
> + if (hwmgr->not_vf)
> amdgpu_bo_free_kernel(&smu_data->smu_buffer.handle,
> &smu_data->smu_buffer.mc_addr,
> &smu_data->smu_buffer.kaddr);
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
> index b51d746..2ba05d2 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
> @@ -199,8 +199,7 @@ static int tonga_start_smu(struct pp_hwmgr *hwmgr)
> int result;
>
> /* Only start SMC if SMC RAM is not running */
> - if (!(smu7_is_smc_ram_running(hwmgr) ||
> - cgs_is_virtualization_enabled(hwmgr->device))) {
> + if (!smu7_is_smc_ram_running(hwmgr) && hwmgr->not_vf) {
> /*Check if SMU is running in protected mode*/
> if (0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
> SMU_FIRMWARE, SMU_MODE)) {
> --
> 1.9.1
>
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