[PATCH 5/6] drm/amdgpu: Enable static cg for vcn on RV

[Alex Deucher]

On Wed, May 16, 2018 at 8:53 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/soc15.c    |  3 ++-
>  drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 16 ++++++++--------
>  2 files changed, 10 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
> index 8ccbcf9..485cb43 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc15.c
> +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
> @@ -711,7 +711,8 @@ static int soc15_common_early_init(void *handle)
>                         AMD_CG_SUPPORT_MC_MGCG |
>                         AMD_CG_SUPPORT_MC_LS |
>                         AMD_CG_SUPPORT_SDMA_MGCG |
> -                       AMD_CG_SUPPORT_SDMA_LS;
> +                       AMD_CG_SUPPORT_SDMA_LS |
> +                       AMD_CG_SUPPORT_VCN_MGCG;

Split out the setting of the flag to enable this from the
implementation.  With that fixed:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

>                 adev->pg_flags = AMD_PG_SUPPORT_SDMA;
>
>                 if (adev->powerplay.pp_feature & PP_GFXOFF_MASK)
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> index 0501746b..9e0a2b1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> @@ -288,14 +288,14 @@ static void vcn_v1_0_mc_resume(struct amdgpu_device *adev)
>   *
>   * Disable clock gating for VCN block
>   */
> -static void vcn_v1_0_disable_clock_gating(struct amdgpu_device *adev, bool sw)
> +static void vcn_v1_0_disable_clock_gating(struct amdgpu_device *adev)
>  {
>         uint32_t data;
>
>         /* JPEG disable CGC */
>         data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL);
>
> -       if (sw)
> +       if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG)
>                 data |= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
>         else
>                 data &= ~JPEG_CGC_CTRL__DYN_CLOCK_MODE_MASK;
> @@ -310,7 +310,7 @@ static void vcn_v1_0_disable_clock_gating(struct amdgpu_device *adev, bool sw)
>
>         /* UVD disable CGC */
>         data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);
> -       if (sw)
> +       if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG)
>                 data |= 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
>         else
>                 data &= ~ UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK;
> @@ -415,13 +415,13 @@ static void vcn_v1_0_disable_clock_gating(struct amdgpu_device *adev, bool sw)
>   *
>   * Enable clock gating for VCN block
>   */
> -static void vcn_v1_0_enable_clock_gating(struct amdgpu_device *adev, bool sw)
> +static void vcn_v1_0_enable_clock_gating(struct amdgpu_device *adev)
>  {
>         uint32_t data = 0;
>
>         /* enable JPEG CGC */
>         data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL);
> -       if (sw)
> +       if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG)
>                 data |= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
>         else
>                 data |= 0 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
> @@ -435,7 +435,7 @@ static void vcn_v1_0_enable_clock_gating(struct amdgpu_device *adev, bool sw)
>
>         /* enable UVD CGC */
>         data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);
> -       if (sw)
> +       if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG)
>                 data |= 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
>         else
>                 data |= 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
> @@ -500,7 +500,7 @@ static int vcn_v1_0_start(struct amdgpu_device *adev)
>         vcn_v1_0_mc_resume(adev);
>
>         /* disable clock gating */
> -       vcn_v1_0_disable_clock_gating(adev, true);
> +       vcn_v1_0_disable_clock_gating(adev);
>
>         /* disable interupt */
>         WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_MASTINT_EN), 0,
> @@ -681,7 +681,7 @@ static int vcn_v1_0_stop(struct amdgpu_device *adev)
>                         ~UVD_LMI_CTRL2__STALL_ARB_UMC_MASK);
>
>         /* enable clock gating */
> -       vcn_v1_0_enable_clock_gating(adev, true);
> +       vcn_v1_0_enable_clock_gating(adev);
>
>         return 0;
>  }
> --
> 1.9.1
>
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