[PATCH] drm/amd/pp: Workaround flickering issue on RV

[Harry Wentland]

On 2018-05-14 09:17 AM, Alex Deucher wrote:
> On Mon, May 14, 2018 at 4:06 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
>> Screen flickering observed while running 1080p video using
>> MPV_VAAPI/VDPAU with 4x4K at 60 monitors
>>
>> Need to set higher mclk in this configuration.
>>
>> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
> 
> Probably longer term we need some sort of bandwidth calculation.
> 

Agreed. We've been looking into it.

Acked-by: Harry Wentland <harry.wentland at amd.com>

Harry

> Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> 
>> ---
>>  drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
>> index 26ee5ed..bce28e3 100644
>> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
>> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
>> @@ -601,7 +601,10 @@ static int smu10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
>>                                                 data->gfx_min_freq_limit/100);
>>                 smum_send_msg_to_smc_with_parameter(hwmgr,
>>                                                 PPSMC_MSG_SetHardMinFclkByFreq,
>> +                                               hwmgr->display_config->num_display > 3 ?
>> +                                               SMU10_UMD_PSTATE_PEAK_FCLK :
>>                                                 SMU10_UMD_PSTATE_MIN_FCLK);
>> +
>>                 smum_send_msg_to_smc_with_parameter(hwmgr,
>>                                                 PPSMC_MSG_SetHardMinSocclkByFreq,
>>                                                 SMU10_UMD_PSTATE_MIN_SOCCLK);
>> --
>> 1.9.1
>>
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