drm/amdgpu: Add helper function to get buffer domain
Christian König
ckoenig.leichtzumerken at gmail.com
Mon May 28 07:07:23 UTC 2018
Reviewed-by: Christian König <christian.koenig at amd.com> for both as well.
Christian.
Am 26.05.2018 um 15:23 schrieb Deucher, Alexander:
>
> Both patches are:
>
> Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
>
> ------------------------------------------------------------------------
> *From:* Sharma, Deepak
> *Sent:* Friday, May 25, 2018 8:19:26 PM
> *To:* amd-gfx at lists.freedesktop.org; Deucher, Alexander;
> michel at daenzer.net; Koenig, Christian
> *Subject:* Re: drm/amdgpu: Add helper function to get buffer domain
> If look fine , please give rb for this and
> https://patchwork.freedesktop.org/patch/224850/
>
> Thanks,
> Deepak
>
> On 05/25/2018 05:12 PM, Deepak Sharma wrote:
> > Move logic of getting supported domain to a helper
> > function
> >
> > Signed-off-by: Deepak Sharma <Deepak.Sharma at amd.com>
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 10 +++-------
> > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 17 ++++++++++++-----
> > drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 3 ++-
> > 3 files changed, 17 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> > index 63758db5e2ea..556406a44da3 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> > @@ -750,19 +750,15 @@ int amdgpu_mode_dumb_create(struct drm_file
> *file_priv,
> > struct amdgpu_device *adev = dev->dev_private;
> > struct drm_gem_object *gobj;
> > uint32_t handle;
> > - u32 domain = amdgpu_display_supported_domains(adev);
> > + u32 domain;
> > int r;
> >
> > args->pitch = amdgpu_align_pitch(adev, args->width,
> > DIV_ROUND_UP(args->bpp, 8), 0);
> > args->size = (u64)args->pitch * args->height;
> > args->size = ALIGN(args->size, PAGE_SIZE);
> > - if (domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
> > - domain = AMDGPU_GEM_DOMAIN_VRAM;
> > - if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
> > - domain = AMDGPU_GEM_DOMAIN_GTT;
> > - }
> > -
> > + domain = amdgpu_bo_get_preferred_pin_domain(adev,
> > + amdgpu_display_supported_domains(adev));
> > r = amdgpu_gem_object_create(adev, args->size, 0, domain,
> > AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
> > false, NULL, &gobj);
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> > index 6a9e46ae7f0a..5e4e1bd90383 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> > @@ -703,11 +703,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo
> *bo, u32 domain,
> > /* This assumes only APU display buffers are pinned with
> (VRAM|GTT).
> > * See function amdgpu_display_supported_domains()
> > */
> > - if (domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
> > - domain = AMDGPU_GEM_DOMAIN_VRAM;
> > - if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
> > - domain = AMDGPU_GEM_DOMAIN_GTT;
> > - }
> > + domain = amdgpu_bo_get_preferred_pin_domain(adev, domain);
> >
> > if (bo->pin_count) {
> > uint32_t mem_type = bo->tbo.mem.mem_type;
> > @@ -1066,3 +1062,14 @@ u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo)
> >
> > return bo->tbo.offset;
> > }
> > +
> > +uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev,
> > + uint32_t domain)
> > +{
> > + if (domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
> > + domain = AMDGPU_GEM_DOMAIN_VRAM;
> > + if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
> > + domain = AMDGPU_GEM_DOMAIN_GTT;
> > + }
> > + return domain;
> > +}
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> > index 540e03fa159f..731748033878 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> > @@ -289,7 +289,8 @@ int amdgpu_bo_restore_from_shadow(struct
> amdgpu_device *adev,
> > struct reservation_object *resv,
> > struct dma_fence **fence,
> > bool direct);
> > -
> > +uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev,
> > + uint32_t domain);
> >
> > /*
> > * sub allocation
> >
>
>
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