[PATCH] drm/amdgpu/vega20: add CLK base offset

[Wentland, Harry]

On 2018-11-06 11:24 a.m., Alex Deucher wrote:
> In case we need to access CLK registers.
> 
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>

Acked-by: Harry Wentland <harry.wentland at amd.com>

Harry

> ---
>  drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> index 2d4473557b0d..d13fc4fcb517 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
> @@ -49,6 +49,7 @@ int vega20_reg_base_init(struct amdgpu_device *adev)
>  		adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i]));
>  		adev->reg_offset[NBIF_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i]));
>  		adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i]));
> +		adev->reg_offset[CLK_HWIP][i] = (uint32_t *)(&(CLK_BASE.instance[i]));
>  	}
>  	return 0;
>  }
>