[PATCH 1/3] drm/amd/powerplay: set a default fclk/gfxclk ratio

[Alex Deucher]

On Tue, Nov 6, 2018 at 8:42 PM Xu, Feifei <Feifei.Xu at amd.com> wrote:
>
> Seriel is reviewed-by: Feifei Xu <Feifei.Xu at amd.com>
>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Evan Quan
> Sent: Wednesday, November 7, 2018 9:38 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Quan, Evan <Evan.Quan at amd.com>
> Subject: [PATCH 1/3] drm/amd/powerplay: set a default fclk/gfxclk ratio
>
> Otherwise big gap between these two clocks may causes some hangs.
>
> Change-Id: Ifa3fafe2ee619d6231d5ecab61d3c68faa34abb6
> Signed-off-by: Evan Quan <evan.quan at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  .../gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c   | 16 ++++++++++++++++
>  .../gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h   |  1 +
>  drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h |  3 ++-
>  3 files changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> index d2da9e3fc827..4f0f444fd111 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> @@ -120,6 +120,7 @@ static void vega20_set_default_registry_data(struct pp_hwmgr *hwmgr)
>         data->registry_data.disable_auto_wattman = 1;
>         data->registry_data.auto_wattman_debug = 0;
>         data->registry_data.auto_wattman_sample_period = 100;
> +       data->registry_data.fclk_gfxclk_ratio = 0x3F6CCCCD;
>         data->registry_data.auto_wattman_threshold = 50;
>         data->registry_data.gfxoff_controlled_by_driver = 1;
>         data->gfxoff_allowed = false;
> @@ -829,6 +830,16 @@ static int vega20_enable_all_smu_features(struct pp_hwmgr *hwmgr)
>         return 0;
>  }
>
> +static int vega20_send_clock_ratio(struct pp_hwmgr *hwmgr) {
> +       struct vega20_hwmgr *data =
> +                       (struct vega20_hwmgr *)(hwmgr->backend);
> +
> +       return smum_send_msg_to_smc_with_parameter(hwmgr,
> +                       PPSMC_MSG_SetFclkGfxClkRatio,
> +                       data->registry_data.fclk_gfxclk_ratio);
> +}
> +
>  static int vega20_disable_all_smu_features(struct pp_hwmgr *hwmgr)  {
>         struct vega20_hwmgr *data =
> @@ -1535,6 +1546,11 @@ static int vega20_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
>                         "[EnableDPMTasks] Failed to enable all smu features!",
>                         return result);
>
> +       result = vega20_send_clock_ratio(hwmgr);
> +       PP_ASSERT_WITH_CODE(!result,
> +                       "[EnableDPMTasks] Failed to send clock ratio!",
> +                       return result);
> +
>         /* Initialize UVD/VCE powergating state */
>         vega20_init_powergate_state(hwmgr);
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
> index 56fe6a0d42e8..25faaa5c5b10 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
> @@ -328,6 +328,7 @@ struct vega20_registry_data {
>         uint8_t   disable_auto_wattman;
>         uint32_t  auto_wattman_debug;
>         uint32_t  auto_wattman_sample_period;
> +       uint32_t  fclk_gfxclk_ratio;
>         uint8_t   auto_wattman_threshold;
>         uint8_t   log_avfs_param;
>         uint8_t   enable_enginess;
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h b/drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h
> index 45d64a81e945..4f63a736ea0e 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h
> @@ -105,7 +105,8 @@
>  #define PPSMC_MSG_SetSystemVirtualDramAddrHigh   0x4B
>  #define PPSMC_MSG_SetSystemVirtualDramAddrLow    0x4C
>  #define PPSMC_MSG_WaflTest                       0x4D
> -// Unused ID 0x4E to 0x50
> +#define PPSMC_MSG_SetFclkGfxClkRatio             0x4E
> +// Unused ID 0x4F to 0x50
>  #define PPSMC_MSG_AllowGfxOff                    0x51
>  #define PPSMC_MSG_DisallowGfxOff                 0x52
>  #define PPSMC_MSG_GetPptLimit                    0x53
> --
> 2.19.1
>
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