[PATCH 1/2] drm/amdgpu/sdma4: use paging queue for buffer funcs

[Gong, Curry]

Result is pass

-----Original Message-----
From: Gong, Curry 
Sent: Thursday, November 8, 2018 4:14 PM
To: Zhang, Jerry <Jerry.Zhang at amd.com>; Alex Deucher <alexdeucher at gmail.com>
Cc: amd-gfx list <amd-gfx at lists.freedesktop.org>; Deucher, Alexander <Alexander.Deucher at amd.com>
Subject: RE: [PATCH 1/2] drm/amdgpu/sdma4: use paging queue for buffer funcs

Hi Alex：

I have tested this patch base on branch "amd-staging-dkms-4.18"
glmark2 and unigine_heaven

Tested-by: Chen Gong <Curry.Gong at amd.com>


-----Original Message-----
From: Zhang, Jerry <Jerry.Zhang at amd.com>
Sent: Thursday, November 8, 2018 3:45 PM
To: Alex Deucher <alexdeucher at gmail.com>; Gong, Curry <Curry.Gong at amd.com>
Cc: amd-gfx list <amd-gfx at lists.freedesktop.org>; Deucher, Alexander <Alexander.Deucher at amd.com>
Subject: Re: [PATCH 1/2] drm/amdgpu/sdma4: use paging queue for buffer funcs

+ Curry

On 11/8/18 10:59 AM, Alex Deucher wrote:
> On Wed, Nov 7, 2018 at 9:05 PM Zhang, Jerry(Junwei) <Jerry.Zhang at amd.com> wrote:
>> On 11/8/18 1:29 AM, Alex Deucher wrote:
>>> Use the paging queue for buffer functions to avoid contention with 
>>> the other queues.
>>>
>>> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
>> Reviewed-by: Junwei Zhang <Jerry.Zhang at amd.com>
> Can someone with a vega10 test this?
>
> Alex
>
>>> ---
>>>    drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 12 +++++++++++-
>>>    1 file changed, 11 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
>>> b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
>>> index e39a09eb0fa1..4b5b47dd2f4c 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
>>> @@ -662,6 +662,10 @@ static void sdma_v4_0_page_stop(struct amdgpu_device *adev)
>>>        u32 rb_cntl, ib_cntl;
>>>        int i;
>>>
>>> +     if ((adev->mman.buffer_funcs_ring == sdma0) ||
>>> +         (adev->mman.buffer_funcs_ring == sdma1))
>>> +             amdgpu_ttm_set_buffer_funcs_status(adev, false);
>>> +
>>>        for (i = 0; i < adev->sdma.num_instances; i++) {
>>>                rb_cntl = RREG32_SDMA(i, mmSDMA0_PAGE_RB_CNTL);
>>>                rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_PAGE_RB_CNTL, 
>>> @@ -1152,6 +1156,9 @@ static int sdma_v4_0_start(struct amdgpu_device *adev)
>>>                        r = amdgpu_ring_test_helper(page);
>>>                        if (r)
>>>                                return r;
>>> +
>>> +                     if (adev->mman.buffer_funcs_ring == page)
>>> +                             
>>> + amdgpu_ttm_set_buffer_funcs_status(adev, true);
>>>                }
>>>
>>>                if (adev->mman.buffer_funcs_ring == ring) @@ -2054,7
>>> +2061,10 @@ static const struct amdgpu_buffer_funcs 
>>> +sdma_v4_0_buffer_funcs = {
>>>    static void sdma_v4_0_set_buffer_funcs(struct amdgpu_device *adev)
>>>    {
>>>        adev->mman.buffer_funcs = &sdma_v4_0_buffer_funcs;
>>> -     adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring;
>>> +     if (adev->sdma.has_page_queue)
>>> +             adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].page;
>>> +     else
>>> +             adev->mman.buffer_funcs_ring = 
>>> + &adev->sdma.instance[0].ring;
>>>    }
>>>
>>>    static const struct amdgpu_vm_pte_funcs sdma_v4_0_vm_pte_funcs = 
>>> {