[PATCH] drm/amdgpu: Limit the max mc address to hole start

[Christian König]

Good question, I asked the same one :)

One problem seems to be a firmware bug in the VCE firmware which seems 
to write to the wrong location in this case.

Another one is probably a coding error in the SDMA handling.

Christian.

Am 10.10.2018 um 16:32 schrieb Liu, Shaoyun:
> Just curious , why the gart range form 0x0000FFFF00000000 to 0x0000FFFF1FFFFFFF  will cause the engine hang ?
>
> Shaoyun.liu
>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Emily Deng
> Sent: Wednesday, October 10, 2018 3:31 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Deng, Emily <Emily.Deng at amd.com>
> Subject: [PATCH] drm/amdgpu: Limit the max mc address to hole start
>
> Use "AMDGPU_GMC_HOLE_START - 1"
>
> For the vram_start is 0 case, the gart range will be from 0x0000FFFF00000000 to 0x0000FFFF1FFFFFFF, which will cause the engine hang.
>
> So to avoid the hole, limit the max mc address to AMDGPU_GMC_HOLE_START.:wq
>
> Signed-off-by: Emily Deng <Emily.Deng at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 6 ++++--
>   1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> index 9a5b252..84aae69 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> @@ -146,6 +146,8 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)  {
>   	const uint64_t four_gb = 0x100000000ULL;
>   	u64 size_af, size_bf;
> +	/*To avoid the hole, limit the max mc address to AMDGPU_GMC_HOLE_START*/
> +	u64 max_mc_address = min(adev->gmc.mc_mask, AMDGPU_GMC_HOLE_START -
> +1);
>   
>   	mc->gart_size += adev->pm.smu_prv_buffer_size;
>   
> @@ -153,7 +155,7 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
>   	 * the GART base on a 4GB boundary as well.
>   	 */
>   	size_bf = mc->fb_start;
> -	size_af = adev->gmc.mc_mask + 1 - ALIGN(mc->fb_end + 1, four_gb);
> +	size_af = max_mc_address + 1 - ALIGN(mc->fb_end + 1, four_gb);
>   
>   	if (mc->gart_size > max(size_bf, size_af)) {
>   		dev_warn(adev->dev, "limiting GART\n"); @@ -164,7 +166,7 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
>   	    (size_af < mc->gart_size))
>   		mc->gart_start = 0;
>   	else
> -		mc->gart_start = mc->mc_mask - mc->gart_size + 1;
> +		mc->gart_start = max_mc_address - mc->gart_size + 1;
>   
>   	mc->gart_start &= ~(four_gb - 1);
>   	mc->gart_end = mc->gart_start + mc->gart_size - 1;
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx