[PATCH 2/8] drm/amdgpu: Expose *_setup_vm_pt_regs for kfd to use

Christian König ckoenig.leichtzumerken at gmail.com
Tue Oct 16 18:32:50 UTC 2018


Am 16.10.2018 um 20:00 schrieb Zhao, Yong:
> Change-Id: I337a61ccfeb68241a0663ba7fad6e0fec1646348
> Signed-off-by: Yong Zhao <Yong.Zhao at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h      |  6 ++++++
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 19 +++++++++++++++----
>   drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 18 ++++++++++++++----
>   3 files changed, 35 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 6317f35..8f81dfd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1269,5 +1269,11 @@ int amdgpu_dm_display_resume(struct amdgpu_device *adev );
>   static inline int amdgpu_dm_display_resume(struct amdgpu_device *adev) { return 0; }
>   #endif
>   
> +/* amdgpu_amdkfd*.c */
> +void gfxhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
> +				uint64_t value);
> +void mmhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
> +				uint64_t value);
> +

Please don't export ASIC specific function in amdgpu.h. If necessary add 
a gmc_v9_0.h file for that.

Apart from that looks like a nice cleanup to me,
Christian.

>   #include "amdgpu_object.h"
>   #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> index ceb7847..71bdb3d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> @@ -39,15 +39,26 @@ static void gfxhub_v1_0_init_gart_pt_regs(struct amdgpu_device *adev)
>   {
>   	uint64_t value = amdgpu_gmc_pd_addr(adev->gart.bo);
>   
> -	WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
> -		     lower_32_bits(value));
> +	gfxhub_v1_0_setup_vm_pt_regs(adev, 0, value);
> +}
> +
> +void gfxhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
> +				uint64_t value)
> +{
> +	/* two registers distance between mmVM_CONTEXT0_* to mmVM_CONTEXT1_* */
> +	int offset = mmVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32
> +			- mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32;
>   
> -	WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
> -		     upper_32_bits(value));
> +	WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
> +				offset * vmid, lower_32_bits(value));
> +
> +	WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
> +				offset * vmid, upper_32_bits(value));
>   }
>   
>   static void gfxhub_v1_0_init_gart_aperture_regs(struct amdgpu_device *adev)
>   {
> +
>   	gfxhub_v1_0_init_gart_pt_regs(adev);
>   
>   	WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> index 14649f8..f86e9a1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> @@ -56,11 +56,21 @@ static void mmhub_v1_0_init_gart_pt_regs(struct amdgpu_device *adev)
>   {
>   	uint64_t value = amdgpu_gmc_pd_addr(adev->gart.bo);
>   
> -	WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
> -		     lower_32_bits(value));
> +	mmhub_v1_0_setup_vm_pt_regs(adev, 0, value);
> +}
> +
> +void mmhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
> +				uint64_t value)
> +{
> +	/* two registers distance between mmVM_CONTEXT0_* to mmVM_CONTEXT1_* */
> +	int offset = mmVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32
> +			- mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32;
> +
> +	WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
> +			offset * vmid, lower_32_bits(value));
>   
> -	WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
> -		     upper_32_bits(value));
> +	WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
> +			offset * vmid, upper_32_bits(value));
>   }
>   
>   static void mmhub_v1_0_init_gart_aperture_regs(struct amdgpu_device *adev)



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