[PATCH v2] drm/amdgpu: Patch csa mc address in IB packet
Rex Zhu
Rex.Zhu at amd.com
Wed Oct 24 06:03:23 UTC 2018
the csa buffer is used by sdma engine to do context
save when preemption happens. it the mc address is zero,
mean the preemtpion feature(MCBP) is disabled.
Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c | 13 +++++++++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h | 2 ++
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 8 ++++++--
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 8 ++++++--
4 files changed, 27 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
index 0fb9907..24b80bc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
@@ -40,3 +40,16 @@ struct amdgpu_sdma_instance * amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
return NULL;
}
+
+int amdgpu_get_sdma_index(struct amdgpu_ring *ring, uint32_t *index)
+{
+ struct amdgpu_device *adev = ring->adev;
+ int i;
+
+ for (i = 0; i < adev->sdma.num_instances; i++)
+ if (ring == &adev->sdma.instance[i].ring ||
+ ring == &adev->sdma.instance[i].page)
+ return i;
+
+ return -EINVAL;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
index 479a245..314078a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
@@ -26,6 +26,7 @@
/* max number of IP instances */
#define AMDGPU_MAX_SDMA_INSTANCES 2
+#define AMDGPU_SDMA_CSA_SIZE (1024)
enum amdgpu_sdma_irq {
AMDGPU_SDMA_IRQ_TRAP0 = 0,
@@ -96,4 +97,5 @@ struct amdgpu_buffer_funcs {
struct amdgpu_sdma_instance *
amdgpu_get_sdma_instance(struct amdgpu_ring *ring);
+int amdgpu_get_sdma_index(struct amdgpu_ring *ring, uint32_t *index);
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index f5e6aa2..fdc5d75 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -424,7 +424,11 @@ static void sdma_v3_0_ring_emit_ib(struct amdgpu_ring *ring,
bool ctx_switch)
{
unsigned vmid = GET_VMID(job);
+ uint64_t csa_mc_addr = job ? job->csa_mc_addr : 0;
+ uint32_t i = 0;
+ if (amdgpu_get_sdma_index(ring, &i))
+ return -EINVAL;
/* IB packet must end on a 8 DW boundary */
sdma_v3_0_ring_insert_nop(ring, (10 - (lower_32_bits(ring->wptr) & 7)) % 8);
@@ -434,8 +438,8 @@ static void sdma_v3_0_ring_emit_ib(struct amdgpu_ring *ring,
amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);
amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));
amdgpu_ring_write(ring, ib->length_dw);
- amdgpu_ring_write(ring, 0);
- amdgpu_ring_write(ring, 0);
+ amdgpu_ring_write(ring, lower_32_bits(csa_mc_addr + i * AMDGPU_SDMA_CSA_SIZE));
+ amdgpu_ring_write(ring, upper_32_bits(csa_mc_addr + i * AMDGPU_SDMA_CSA_SIZE));
}
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 2282ac1..e69a584 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -507,7 +507,11 @@ static void sdma_v4_0_ring_emit_ib(struct amdgpu_ring *ring,
bool ctx_switch)
{
unsigned vmid = GET_VMID(job);
+ uint64_t csa_mc_addr = job ? job->csa_mc_addr : 0;
+ uint32_t i = 0;
+ if (amdgpu_get_sdma_index(ring, &i))
+ return -EINVAL;
/* IB packet must end on a 8 DW boundary */
sdma_v4_0_ring_insert_nop(ring, (10 - (lower_32_bits(ring->wptr) & 7)) % 8);
@@ -517,8 +521,8 @@ static void sdma_v4_0_ring_emit_ib(struct amdgpu_ring *ring,
amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);
amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));
amdgpu_ring_write(ring, ib->length_dw);
- amdgpu_ring_write(ring, 0);
- amdgpu_ring_write(ring, 0);
+ amdgpu_ring_write(ring, lower_32_bits(csa_mc_addr + i * AMDGPU_SDMA_CSA_SIZE));
+ amdgpu_ring_write(ring, upper_32_bits(csa_mc_addr + i * AMDGPU_SDMA_CSA_SIZE));
}
--
1.9.1
More information about the amd-gfx
mailing list