[PATCH 3/3] drm/amdgpu: Patch csa mc address to sdma IB packet

[Rex Zhu]

the csa buffer is used by sdma engine to do context
save when preemption happens. if the mc address is zero,
mean the preemtpion feature(MCBP) is disabled.

Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_job.h  |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h |  1 +
 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c   | 11 ++++++++---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c   | 11 +++++++++--
 4 files changed, 20 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h
index 15b4d39..e4a0837 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h
@@ -33,7 +33,9 @@
 #define to_amdgpu_job(sched_job)		\
 		container_of((sched_job), struct amdgpu_job, base)
 
+
 #define AMDGPU_JOB_GET_VMID(job) ((job) ? (job)->vmid : 0)
+#define AMDGPU_JOB_GET_CSA_MC_ADDR(job) ((job) ? (job)->csa_mc_addr : 0)
 
 struct amdgpu_fence;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
index 479a245..237a357 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
@@ -26,6 +26,7 @@
 
 /* max number of IP instances */
 #define AMDGPU_MAX_SDMA_INSTANCES		2
+#define AMDGPU_SDMA_CSA_SIZE			(1024)
 
 enum amdgpu_sdma_irq {
 	AMDGPU_SDMA_IRQ_TRAP0 = 0,
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index 8bfc68d..ae8f5db 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -424,6 +424,12 @@ static void sdma_v3_0_ring_emit_ib(struct amdgpu_ring *ring,
 				   bool ctx_switch)
 {
 	unsigned vmid = AMDGPU_JOB_GET_VMID(job);
+	uint64_t csa_mc_addr = AMDGPU_JOB_GET_CSA_MC_ADDR(job);
+
+	if (csa_mc_addr == 0 || vmid == 0)
+		csa_mc_addr = 0;
+	else
+		csa_mc_addr += ring->idx * AMDGPU_SDMA_CSA_SIZE;
 
 	/* IB packet must end on a 8 DW boundary */
 	sdma_v3_0_ring_insert_nop(ring, (10 - (lower_32_bits(ring->wptr) & 7)) % 8);
@@ -434,9 +440,8 @@ static void sdma_v3_0_ring_emit_ib(struct amdgpu_ring *ring,
 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);
 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));
 	amdgpu_ring_write(ring, ib->length_dw);
-	amdgpu_ring_write(ring, 0);
-	amdgpu_ring_write(ring, 0);
-
+	amdgpu_ring_write(ring, lower_32_bits(csa_mc_addr));
+	amdgpu_ring_write(ring, upper_32_bits(csa_mc_addr));
 }
 
 /**
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 64fa6be..eede68e 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -506,7 +506,14 @@ static void sdma_v4_0_ring_emit_ib(struct amdgpu_ring *ring,
 				   struct amdgpu_ib *ib,
 				   bool ctx_switch)
 {
+
 	unsigned vmid = AMDGPU_JOB_GET_VMID(job);
+	uint64_t csa_mc_addr = AMDGPU_JOB_GET_CSA_MC_ADDR(job);
+
+	if (csa_mc_addr == 0 || vmid == 0)
+		csa_mc_addr = 0;
+	else
+		csa_mc_addr += ring->idx * AMDGPU_SDMA_CSA_SIZE;
 
 	/* IB packet must end on a 8 DW boundary */
 	sdma_v4_0_ring_insert_nop(ring, (10 - (lower_32_bits(ring->wptr) & 7)) % 8);
@@ -517,8 +524,8 @@ static void sdma_v4_0_ring_emit_ib(struct amdgpu_ring *ring,
 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);
 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));
 	amdgpu_ring_write(ring, ib->length_dw);
-	amdgpu_ring_write(ring, 0);
-	amdgpu_ring_write(ring, 0);
+	amdgpu_ring_write(ring, lower_32_bits(csa_mc_addr));
+	amdgpu_ring_write(ring, upper_32_bits(csa_mc_addr));
 
 }
 
-- 
1.9.1