[PATCH] drm/amdgpu: remove fence fallback
Zhou, David(ChunMing)
David1.Zhou at amd.com
Tue Sep 18 09:01:12 UTC 2018
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of
> Christian K?nig
> Sent: Tuesday, September 18, 2018 4:43 PM
> To: amd-gfx at lists.freedesktop.org
> Subject: [PATCH] drm/amdgpu: remove fence fallback
>
> DC doesn't seem to have a fallback path either.
>
> So when interrupts doesn't work any more we are pretty much busted no
> matter what.
>
> Signed-off-by: Christian König <christian.koenig at amd.com>
Reviewed-by: Chunming Zhou <david1.zhou at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
> drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 56 ---------------------------
> ---- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 -
> 3 files changed, 58 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 27382767e15a..c18d68575462 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -146,7 +146,6 @@ extern int amdgpu_cik_support;
> #define AMDGPU_DEFAULT_GTT_SIZE_MB 3072ULL /* 3GB by
> default */
> #define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS 3000
> #define AMDGPU_MAX_USEC_TIMEOUT 100000 /* 100
> ms */
> -#define AMDGPU_FENCE_JIFFIES_TIMEOUT (HZ / 2)
> /* AMDGPU_IB_POOL_SIZE must be a power of 2 */
> #define AMDGPU_IB_POOL_SIZE 16
> #define AMDGPU_DEBUGFS_MAX_COMPONENTS 32
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
> index da36731460b5..176f28777f5e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
> @@ -195,19 +195,6 @@ int amdgpu_fence_emit_polling(struct amdgpu_ring
> *ring, uint32_t *s)
> return 0;
> }
>
> -/**
> - * amdgpu_fence_schedule_fallback - schedule fallback check
> - *
> - * @ring: pointer to struct amdgpu_ring
> - *
> - * Start a timer as fallback to our interrupts.
> - */
> -static void amdgpu_fence_schedule_fallback(struct amdgpu_ring *ring) -{
> - mod_timer(&ring->fence_drv.fallback_timer,
> - jiffies + AMDGPU_FENCE_JIFFIES_TIMEOUT);
> -}
> -
> /**
> * amdgpu_fence_process - check for fence activity
> *
> @@ -229,9 +216,6 @@ void amdgpu_fence_process(struct amdgpu_ring
> *ring)
>
> } while (atomic_cmpxchg(&drv->last_seq, last_seq, seq) != last_seq);
>
> - if (seq != ring->fence_drv.sync_seq)
> - amdgpu_fence_schedule_fallback(ring);
> -
> if (unlikely(seq == last_seq))
> return;
>
> @@ -262,21 +246,6 @@ void amdgpu_fence_process(struct amdgpu_ring
> *ring)
> } while (last_seq != seq);
> }
>
> -/**
> - * amdgpu_fence_fallback - fallback for hardware interrupts
> - *
> - * @work: delayed work item
> - *
> - * Checks for fence activity.
> - */
> -static void amdgpu_fence_fallback(struct timer_list *t) -{
> - struct amdgpu_ring *ring = from_timer(ring, t,
> - fence_drv.fallback_timer);
> -
> - amdgpu_fence_process(ring);
> -}
> -
> /**
> * amdgpu_fence_wait_empty - wait for all fences to signal
> *
> @@ -424,8 +393,6 @@ int amdgpu_fence_driver_init_ring(struct
> amdgpu_ring *ring,
> atomic_set(&ring->fence_drv.last_seq, 0);
> ring->fence_drv.initialized = false;
>
> - timer_setup(&ring->fence_drv.fallback_timer,
> amdgpu_fence_fallback, 0);
> -
> ring->fence_drv.num_fences_mask = num_hw_submission * 2 - 1;
> spin_lock_init(&ring->fence_drv.lock);
> ring->fence_drv.fences = kcalloc(num_hw_submission * 2,
> sizeof(void *), @@ -501,7 +468,6 @@ void amdgpu_fence_driver_fini(struct
> amdgpu_device *adev)
> amdgpu_irq_put(adev, ring->fence_drv.irq_src,
> ring->fence_drv.irq_type);
> drm_sched_fini(&ring->sched);
> - del_timer_sync(&ring->fence_drv.fallback_timer);
> for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j)
> dma_fence_put(ring->fence_drv.fences[j]);
> kfree(ring->fence_drv.fences);
> @@ -594,27 +560,6 @@ static const char
> *amdgpu_fence_get_timeline_name(struct dma_fence *f)
> return (const char *)fence->ring->name; }
>
> -/**
> - * amdgpu_fence_enable_signaling - enable signalling on fence
> - * @fence: fence
> - *
> - * This function is called with fence_queue lock held, and adds a callback
> - * to fence_queue that checks if this fence is signaled, and if so it
> - * signals the fence and removes itself.
> - */
> -static bool amdgpu_fence_enable_signaling(struct dma_fence *f) -{
> - struct amdgpu_fence *fence = to_amdgpu_fence(f);
> - struct amdgpu_ring *ring = fence->ring;
> -
> - if (!timer_pending(&ring->fence_drv.fallback_timer))
> - amdgpu_fence_schedule_fallback(ring);
> -
> - DMA_FENCE_TRACE(&fence->base, "armed on ring %i!\n", ring-
> >idx);
> -
> - return true;
> -}
> -
> /**
> * amdgpu_fence_free - free up the fence memory
> *
> @@ -645,7 +590,6 @@ static void amdgpu_fence_release(struct dma_fence
> *f) static const struct dma_fence_ops amdgpu_fence_ops = {
> .get_driver_name = amdgpu_fence_get_driver_name,
> .get_timeline_name = amdgpu_fence_get_timeline_name,
> - .enable_signaling = amdgpu_fence_enable_signaling,
> .release = amdgpu_fence_release,
> };
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> index 9cc239968e40..44fc665e4577 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> @@ -77,7 +77,6 @@ struct amdgpu_fence_driver {
> bool initialized;
> struct amdgpu_irq_src *irq_src;
> unsigned irq_type;
> - struct timer_list fallback_timer;
> unsigned num_fences_mask;
> spinlock_t lock;
> struct dma_fence **fences;
> --
> 2.14.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
More information about the amd-gfx
mailing list