[PATCH 1/7] drm/amd/pp: Expose the smu support for SDMA PG cntl

[Alex Deucher]

On Wed, Sep 26, 2018 at 8:51 AM Rex Zhu <Rex.Zhu at amd.com> wrote:
>
> SDMA IP can be power up/down via smu message
>
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/powerplay/amd_powerplay.c     | 18 ++++++++++++++++++
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c |  8 ++++++++
>  drivers/gpu/drm/amd/powerplay/inc/hwmgr.h         |  1 +
>  3 files changed, 27 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index 53d3337..aff7c14 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -1214,6 +1214,21 @@ static void pp_dpm_powergate_acp(void *handle, bool gate)
>         hwmgr->hwmgr_func->powergate_acp(hwmgr, gate);
>  }
>
> +static void pp_dpm_powergate_sdma(void *handle, bool gate)
> +{
> +       struct pp_hwmgr *hwmgr = handle;
> +
> +       if (!hwmgr)
> +               return;
> +
> +       if (hwmgr->hwmgr_func->powergate_sdma == NULL) {
> +               pr_info("%s was not implemented.\n", __func__);
> +               return;
> +       }
> +
> +       hwmgr->hwmgr_func->powergate_sdma(hwmgr, gate);
> +}
> +
>  static int pp_set_powergating_by_smu(void *handle,
>                                 uint32_t block_type, bool gate)
>  {
> @@ -1236,6 +1251,9 @@ static int pp_set_powergating_by_smu(void *handle,
>         case AMD_IP_BLOCK_TYPE_ACP:
>                 pp_dpm_powergate_acp(handle, gate);
>                 break;
> +       case AMD_IP_BLOCK_TYPE_SDMA:
> +               pp_dpm_powergate_sdma(handle, gate);
> +               break;
>         default:
>                 break;
>         }
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> index 5d1dae2..b7a9d0c 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> @@ -1153,6 +1153,14 @@ static int smu10_powergate_mmhub(struct pp_hwmgr *hwmgr)
>         return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerGateMmHub);
>  }
>
> +static int smu10_powergate_sdma(struct pp_hwmgr *hwmgr, bool gate)
> +{
> +       if (gate)
> +               return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerDownSdma);
> +       else
> +               return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerUpSdma);
> +}
> +
>  static void smu10_powergate_vcn(struct pp_hwmgr *hwmgr, bool bgate)
>  {
>         if (bgate) {
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> index a6d9212..d1183b1 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> @@ -328,6 +328,7 @@ struct pp_hwmgr_func {
>         int (*set_power_limit)(struct pp_hwmgr *hwmgr, uint32_t n);
>         int (*powergate_mmhub)(struct pp_hwmgr *hwmgr);
>         int (*smus_notify_pwe)(struct pp_hwmgr *hwmgr);
> +       int (*powergate_sdma)(struct pp_hwmgr *hwmgr, bool bgate);
>  };
>
>  struct pp_table_func {
> --
> 1.9.1
>
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