[PATCH 2/7] drm/amdgpu: Move out power up/down sdma out of smu

Alex Deucher alexdeucher at gmail.com
Wed Sep 26 14:13:29 UTC 2018


On Wed, Sep 26, 2018 at 8:52 AM Rex Zhu <Rex.Zhu at amd.com> wrote:
>
> smu only expose interface to other ip blocks.
> in order to reduce dependence between smu and other ip blocks
>
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c              |  6 ++++++
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c   |  1 +
>  drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c | 15 ---------------
>  3 files changed, 7 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index 12e577c..c20d413 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -1364,6 +1364,9 @@ static int sdma_v4_0_hw_init(void *handle)
>         int r;
>         struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> +       if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs->set_powergating_by_smu)
> +               amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, false);
> +
>         sdma_v4_0_init_golden_registers(adev);
>
>         r = sdma_v4_0_start(adev);
> @@ -1381,6 +1384,9 @@ static int sdma_v4_0_hw_fini(void *handle)
>         sdma_v4_0_ctx_switch_enable(adev, false);
>         sdma_v4_0_enable(adev, false);
>
> +       if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs->set_powergating_by_smu)
> +               amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, true);
> +
>         return 0;
>  }
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> index b7a9d0c..dd18cb7 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> @@ -1216,6 +1216,7 @@ static void smu10_powergate_vcn(struct pp_hwmgr *hwmgr, bool bgate)
>         .smus_notify_pwe = smu10_smus_notify_pwe,
>         .display_clock_voltage_request = smu10_display_clock_voltage_request,
>         .powergate_gfx = smu10_gfx_off_control,
> +       .powergate_sdma = smu10_powergate_sdma,
>  };
>
>  int smu10_init_function_pointers(struct pp_hwmgr *hwmgr)
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
> index 6f961de..d78d864 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
> @@ -186,19 +186,6 @@ static int smu10_verify_smc_interface(struct pp_hwmgr *hwmgr)
>         return 0;
>  }
>
> -/* sdma is disabled by default in vbios, need to re-enable in driver */
> -static void smu10_smc_enable_sdma(struct pp_hwmgr *hwmgr)
> -{
> -       smu10_send_msg_to_smc(hwmgr,
> -                       PPSMC_MSG_PowerUpSdma);
> -}
> -
> -static void smu10_smc_disable_sdma(struct pp_hwmgr *hwmgr)
> -{
> -       smu10_send_msg_to_smc(hwmgr,
> -                       PPSMC_MSG_PowerDownSdma);
> -}
> -
>  /* vcn is disabled by default in vbios, need to re-enable in driver */
>  static void smu10_smc_enable_vcn(struct pp_hwmgr *hwmgr)
>  {
> @@ -218,7 +205,6 @@ static int smu10_smu_fini(struct pp_hwmgr *hwmgr)
>                         (struct smu10_smumgr *)(hwmgr->smu_backend);
>
>         if (priv) {
> -               smu10_smc_disable_sdma(hwmgr);
>                 smu10_smc_disable_vcn(hwmgr);
>                 amdgpu_bo_free_kernel(&priv->smu_tables.entry[SMU10_WMTABLE].handle,
>                                         &priv->smu_tables.entry[SMU10_WMTABLE].mc_addr,
> @@ -243,7 +229,6 @@ static int smu10_start_smu(struct pp_hwmgr *hwmgr)
>
>         if (smu10_verify_smc_interface(hwmgr))
>                 return -EINVAL;
> -       smu10_smc_enable_sdma(hwmgr);
>         smu10_smc_enable_vcn(hwmgr);
>         return 0;
>  }
> --
> 1.9.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx


More information about the amd-gfx mailing list