[PATCH] drm/amd/powerplay: correct navi10 vcn powergate

[Feng, Kenneth]

Reviewed-by: Kenneth Feng <kenneth.feng at amd.com>


-----Original Message-----
From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf Of Evan Quan
Sent: Friday, August 02, 2019 5:27 PM
To: amd-gfx at lists.freedesktop.org
Cc: Quan, Evan <Evan.Quan at amd.com>
Subject: [PATCH] drm/amd/powerplay: correct navi10 vcn powergate

[CAUTION: External Email]

vcn dpm on is a prerequisite for vcn power gate control.

Change-Id: If89a81bc0709f1c26569e378507a873cfaf6e0ef
Signed-off-by: Evan Quan <evan.quan at amd.com>
---
 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c    |  4 +++-
 .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h    |  1 +
 drivers/gpu/drm/amd/powerplay/navi10_ppt.c    | 23 ++++++++++++-------
 3 files changed, 19 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index 4c873b960afe..15f9113146ed 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -400,6 +400,8 @@ int smu_get_power_num_states(struct smu_context *smu,  int smu_common_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor,
                           void *data, uint32_t *size)  {
+       struct smu_power_context *smu_power = &smu->smu_power;
+       struct smu_power_gate *power_gate = &smu_power->power_gate;
        int ret = 0;

        switch (sensor) {
@@ -424,7 +426,7 @@ int smu_common_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor,
                *size = 4;
                break;
        case AMDGPU_PP_SENSOR_VCN_POWER_STATE:
-               *(uint32_t *)data = smu_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT) ? 1 : 0;
+               *(uint32_t *)data = power_gate->vcn_gated ? 0 : 1;
                *size = 4;
                break;
        default:
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index 1ecd73cd768c..2579b002616c 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -277,6 +277,7 @@ struct smu_dpm_context {  struct smu_power_gate {
        bool uvd_gated;
        bool vce_gated;
+       bool vcn_gated;
 };

 struct smu_power_context {
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index f3adb713784a..b7bb0f78f489 100644
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -590,20 +590,27 @@ static int navi10_set_default_dpm_table(struct smu_context *smu)

 static int navi10_dpm_set_uvd_enable(struct smu_context *smu, bool enable)  {
+       struct smu_power_context *smu_power = &smu->smu_power;
+       struct smu_power_gate *power_gate = &smu_power->power_gate;
        int ret = 0;

        if (enable) {
-               ret = smu_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn, 1);
-               if (ret)
-                       return ret;
+               /* vcn dpm on is a prerequisite for vcn power gate messages */
+               if (smu_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) {
+                       ret = smu_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn, 1);
+                       if (ret)
+                               return ret;
+               }
+               power_gate->vcn_gated = false;
        } else {
-               ret = smu_send_smc_msg(smu, SMU_MSG_PowerDownVcn);
-               if (ret)
-                       return ret;
+               if (smu_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) {
+                       ret = smu_send_smc_msg(smu, SMU_MSG_PowerDownVcn);
+                       if (ret)
+                               return ret;
+               }
+               power_gate->vcn_gated = true;
        }

-       ret = smu_feature_set_enabled(smu, SMU_FEATURE_VCN_PG_BIT, enable);
-
        return ret;
 }

--
2.22.0

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