[PATCH] drm/amdgpu: Set VM_L2_CNTL.PDE_FAULT_CLASSIFICATION to 0 for GFX10

[Christian König]

Am 13.08.19 um 20:43 schrieb Zhao, Yong:
> We have done this for pre-GFX10 asics, but GFX10 did not pick up the
> new change. The below is the commit message for that change.
>
> This is recommended by HW designers. Previously when it was set to 1,
> the PDE walk error in VM fault will be treated as
> PERMISSION_OR_INVALID_PAGE_FAULT rather than usually expected OTHER_FAULT.
> As a result, the retry control in VM_CONTEXT*_CNTL will change accordingly.
>
> The above behavior is kind of abnormal. Furthermore, the
> PDE_FAULT_CLASSIFICATION == 1 feature was targeted for very old ASICs
> and it never made it way to production. Therefore, we should set it to 0.
>
> Change-Id: If1beedb631d16b85d072aa96657a7a75fa378480
> Signed-off-by: Yong Zhao <Yong.Zhao at amd.com>

Reviewed-by: Christian König <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 2 +-
>   drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c  | 2 +-
>   2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> index 8ce5bf5feb45..8b789f750b72 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> @@ -140,7 +140,7 @@ static void gfxhub_v2_0_init_cache_regs(struct amdgpu_device *adev)
>   	/* XXX for emulation, Refer to closed source code.*/
>   	tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL,
>   			    L2_PDE0_CACHE_TAG_GENERATION_MODE, 0);
> -	tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, PDE_FAULT_CLASSIFICATION, 1);
> +	tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, PDE_FAULT_CLASSIFICATION, 0);
>   	tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1);
>   	tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, IDENTITY_MODE_FRAGMENT_SIZE, 0);
>   	WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL, tmp);
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> index 8ee1225d1a18..3542c203c3c8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> @@ -126,7 +126,7 @@ static void mmhub_v2_0_init_cache_regs(struct amdgpu_device *adev)
>   	/* XXX for emulation, Refer to closed source code.*/
>   	tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, L2_PDE0_CACHE_TAG_GENERATION_MODE,
>   			    0);
> -	tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, PDE_FAULT_CLASSIFICATION, 1);
> +	tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, PDE_FAULT_CLASSIFICATION, 0);
>   	tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1);
>   	tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, IDENTITY_MODE_FRAGMENT_SIZE, 0);
>   	WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL, tmp);