[PATCH 3/3] drm/amdgpu: Use new mode2 reset interface for RV.

[Alex Deucher]

On Wed, Aug 14, 2019 at 3:54 PM Andrey Grodzovsky
<andrey.grodzovsky at amd.com> wrote:
>
> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  1 +
>  drivers/gpu/drm/amd/amdgpu/soc15.c         | 21 +++++++++++++--------
>  2 files changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 2752773..02b3e7d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -3524,6 +3524,7 @@ bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev)
>                 case CHIP_VEGA20:
>                 case CHIP_VEGA10:
>                 case CHIP_VEGA12:
> +               case CHIP_RAVEN:
>                         break;
>                 default:
>                         goto disabled;
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
> index c2d324d..7a9b89d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc15.c
> +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
> @@ -508,6 +508,11 @@ static int soc15_asic_baco_reset(struct amdgpu_device *adev)
>         return 0;
>  }
>
> +static int soc15_mode2_reset(struct amdgpu_device *adev)
> +{

Please check the ppfuncs pointers here similar to soc15_asic_baco_reset()

Alex

> +       return adev->powerplay.pp_funcs->asic_reset_mod_2(adev->powerplay.pp_handle);
> +}
> +
>  static enum amd_reset_method
>  soc15_asic_reset_method(struct amdgpu_device *adev)
>  {
> @@ -546,14 +551,14 @@ soc15_asic_reset_method(struct amdgpu_device *adev)
>
>  static int soc15_asic_reset(struct amdgpu_device *adev)
>  {
> -       int ret;
> -
> -       if (soc15_asic_reset_method(adev) == AMD_RESET_METHOD_BACO)
> -               ret = soc15_asic_baco_reset(adev);
> -       else
> -               ret = soc15_asic_mode1_reset(adev);
> -
> -       return ret;
> +       switch (soc15_asic_reset_method(adev)) {
> +               case AMD_RESET_METHOD_BACO:
> +                       return soc15_asic_baco_reset(adev);
> +               case AMD_RESET_METHOD_MODE2:
> +                       return soc15_mode2_reset(adev);
> +               default:
> +                       return soc15_asic_mode1_reset(adev);
> +       }
>  }
>
>  /*static int soc15_set_uvd_clock(struct amdgpu_device *adev, u32 clock,
> --
> 2.7.4
>
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