[PATCH] drm/amd/powerpaly: fix navi series custom peak level value error

[Quan, Evan]

Reviewed-by: Evan Quan <evan.quan at amd.com>

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of
> Wang, Kevin(Yang)
> Sent: Wednesday, August 21, 2019 1:48 PM
> To: amd-gfx at lists.freedesktop.org
> Cc: Xu, Feifei <Feifei.Xu at amd.com>; Wang, Kevin(Yang)
> <Kevin1.Wang at amd.com>
> Subject: [PATCH] drm/amd/powerpaly: fix navi series custom peak level
> value error
> 
> fix other navi asic set peak performance level error.
> because the navi10_ppt.c will handle navi12 14 asic, it will use navi10 peak
> value to set other asic, it is not correct.
> 
> after patch:
> only navi10 use custom peak value, other asic will used default value.
> 
> Signed-off-by: Kevin Wang <kevin1.wang at amd.com>
> ---
>  drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> index 0955fe8145b9..eb8adf3b0a5c 100644
> --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> @@ -1422,6 +1422,10 @@ static int navi10_set_peak_clock_by_device(struct
> smu_context *smu)  static int navi10_set_performance_level(struct
> smu_context *smu, enum amd_dpm_forced_level level)  {
>  	int ret = 0;
> +	struct amdgpu_device *adev = smu->adev;
> +
> +	if (adev->asic_type != CHIP_NAVI10)
> +		return -EINVAL;
> 
>  	switch (level) {
>  	case AMD_DPM_FORCED_LEVEL_PROFILE_PEAK:
> --
> 2.22.0
> 
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